L1[00:00:22] <Hawk777> Since cable doesn’t
have any delay, and ICs I think have one tick of delay from input
to output.
L2[00:00:31] 
<Neuro>
yes, but somehow the inputs turn off at t=0 as well
<Neuro>
yes, but somehow the inputs turn off at t=0 as wellL3[00:00:36] <Hawk777> Oh, how do you know
that?
L4[00:00:44] <Neuro>
because the circuit doesnt work lol
<Neuro>
because the circuit doesnt work lolL5[00:00:49] <Neuro>
otherwise it would
<Neuro>
otherwise it wouldL6[00:01:04] <Hawk777> Oh, I thought your
complaint was that the latches reading the inputs recorded the OFF
state, which would happen if the inputs turned off at t=1 but
ordered-before the latches becoming opaque.
L7[00:01:17] <Neuro>
they seem to be yeah
<Neuro>
they seem to be yeahL8[00:01:22] <Neuro>
sorry maybe I misunderstand you
<Neuro>
sorry maybe I misunderstand youL9[00:02:11] <Hawk777> Right. So if at t=0,
the outputs turn off first and then the latches become transparent,
then we have the propagation delay, then at t=1 the inputs turn off
first, the latches see their data lines go low, and then the
latches become opaque, then the latches would record low.
L10[00:02:20] <Hawk777> Even though the
outputs only changed at t=1.
L11[00:02:22] <Hawk777> *inputs
L12[00:02:28] <Neuro> ah
I see now
<Neuro> ah
I see nowL13[00:02:31] <Hawk777> (outputs changed at
t=0, inputs at t=1)
L14[00:02:31] <Neuro> I
get what you were talking about
<Neuro> I
get what you were talking aboutL15[00:02:36] <Neuro>
cause the tlatch records on falling edge
<Neuro>
cause the tlatch records on falling edgeL16[00:02:39] <Hawk777> Exactly.
L17[00:02:56] <Neuro> and
even though this all happens in an instant in ingame time
<Neuro> and
even though this all happens in an instant in ingame timeL18[00:03:03] <Hawk777> So if the falling
edge of control and the falling edge of data arrive on the same
tick, but the falling edge of data is ordered-before the falling
edge of control, then the latches record low.
L19[00:03:16] <Neuro> the
simulated time seems to choose to propagate those linked inputs and
outputs in its own internal time
<Neuro> the
simulated time seems to choose to propagate those linked inputs and
outputs in its own internal timeL20[00:03:30] <Neuro> ok
so all I need is a latch that records on rising edge
<Neuro> ok
so all I need is a latch that records on rising edgeL21[00:03:30] <Neuro>
hmm
<Neuro>
hmmL22[00:03:39] <Hawk777> That’s a latch with
a NOT gate in its control line.
L23[00:03:51] <Neuro>
yeah that's first thing that came to mind
<Neuro>
yeah that's first thing that came to mindL24[00:03:58] <Hawk777> In fact a flip flop
(aka edge-sensitive latch) is just two level-sensitive latches in a
row, one with the control input inverted.
L25[00:05:00] <Neuro>
yeah the tlatch recording on falling edge bit was the bit I didnt
get
<Neuro>
yeah the tlatch recording on falling edge bit was the bit I didnt
getL26[00:05:07] <Neuro> I
saw it as recording on rising edge
<Neuro> I
saw it as recording on rising edgeL27[00:05:26] <Neuro> you
have to understand, I have no "normal" education in these
things, the word "transparent latch" means nothing to me
inherently
<Neuro> you
have to understand, I have no "normal" education in these
things, the word "transparent latch" means nothing to me
inherentlyL28[00:05:34] <Neuro> but
I looked it up and yeah, makes sense it records on fall
<Neuro> but
I looked it up and yeah, makes sense it records on fallL29[00:05:57] <Neuro> you
have to understand, I have no "normal" education in these
things, the word "transparent latch" means nothing to me
inherently beyond what I have experienced in projectred.
[Edited]
<Neuro> you
have to understand, I have no "normal" education in these
things, the word "transparent latch" means nothing to me
inherently beyond what I have experienced in projectred.
[Edited]L30[00:07:04] <Neuro>
it's still confusing though because as you say yourself, this is
all simulated time
<Neuro>
it's still confusing though because as you say yourself, this is
all simulated timeL31[00:07:15] <Neuro> an
in-IC pulse former doesn't actually propagate a pulse through
minecraft time
<Neuro> an
in-IC pulse former doesn't actually propagate a pulse through
minecraft timeL32[00:07:30] <Neuro> but
somehow it still chooses to simulate the connected inputs and
outputs
<Neuro> but
somehow it still chooses to simulate the connected inputs and
outputsL33[00:07:49] <Neuro>
well anyway, I am checking if it works
<Neuro>
well anyway, I am checking if it worksL34[00:08:51] <Hawk777> It does though,
doesn’t it? An in-IC pulse former sets its output high at t=0 and
then low at t=1?
L35[00:09:19] <Hawk777> It doesn’t have a
propagation delay, in the sense that it sets its output high
immediately when its input goes high. But it still sets its output
*low* one tick later, I think.
L36[00:10:56] <Neuro>
maybe it does I suppose. That would have other, more irritating
ramifications though
<Neuro>
maybe it does I suppose. That would have other, more irritating
ramifications thoughL37[00:11:17] <Hawk777> Well, if it
*didn’t* do that, then an IC with nothing but a pulse former in it
would never produce any output at all.
L38[00:11:31] <Hawk777> Since the pulse
would be zero time wide, and therefore not exist in the outside
world.
L39[00:11:34] <Neuro>
suppose thats an easy enough test
<Neuro>
suppose thats an easy enough testL40[00:12:07] <Neuro>
although they might catch that specifically somehow
<Neuro>
although they might catch that specifically somehowL41[00:12:42] <Neuro> nah
it works so you are most likely right
<Neuro> nah
it works so you are most likely rightL42[00:12:44] <dequbed> Hawk777: Hey now,
the laplace impulse *has* a nonzero energy level so it affects real
world with zero width :P
L43[00:14:45] <Hawk777> Hah.
L44[00:18:01] <Neuro>
well
<Neuro>
wellL45[00:18:12] <Neuro>
inverting the latch input doesn't work because of other
reasons
<Neuro>
inverting the latch input doesn't work because of other
reasonsL46[00:18:16] <Neuro> but
I can work from that at least
<Neuro> but
I can work from that at leastL47[00:18:20] <Neuro>
thx
<Neuro>
thxL48[00:18:30] <Neuro>
(sorry latch control)
<Neuro>
(sorry latch control)L49[00:24:15] <Neuro> aa
im gonna have to do something stupid for this. dont like when I
have to do stupid things
<Neuro> aa
im gonna have to do something stupid for this. dont like when I
have to do stupid thingsL50[00:24:20] <Hawk777> Yeah, I’m not sure
whether you could actually build a reliable flip flop by putting
two latches in front of each other with one control signal inverted
in PR.
L51[00:24:30] <Hawk777> IRL it works, but
not sure in PR.
L52[00:24:48] ⇦
Quits: Vexatos (~Vexatos@port-92-192-131-75.dynamic.as20676.net)
(Quit: Insert quantum chemistry joke here)
L53[00:24:55] <Hawk777> I think in PR it
would run into the same problem.
L54[00:25:12] <MichiBot> @Ariri REMINDER:
look at articles from Izaya
L55[00:27:04] <Neuro>
just need to make a latch that stores on high. will probably have
to cook up some nonsense for that but certainly possible
<Neuro>
just need to make a latch that stores on high. will probably have
to cook up some nonsense for that but certainly possibleL56[00:27:13] <Mimiru> %test
L57[00:27:13] <MichiBot> Mimiru:
Success
L58[00:27:16] <Kristopher38> Oh boy what a lengthy
discussion
<Kristopher38> Oh boy what a lengthy
discussionL59[00:28:14] <Neuro>
just me having troubles with the consequences of my own silly
decisions
<Neuro>
just me having troubles with the consequences of my own silly
decisionsL60[00:28:49] <Neuro> it
would be very easy to implement an external controller for
this
<Neuro> it
would be very easy to implement an external controller for
thisL61[00:28:59] <Neuro> but
as noted, that's an extra 2 ticks of delay
<Neuro> but
as noted, that's an extra 2 ticks of delayL62[00:29:45] <Neuro> so
instead each memory line access gate contains its whole own bunch
of circuitry that syncs with all the others as they each
independently figure out who gets to go
<Neuro> so
instead each memory line access gate contains its whole own bunch
of circuitry that syncs with all the others as they each
independently figure out who gets to goL63[00:30:09] <Neuro>
which is as stupid as it sounds and totally not how you would do it
in anything real but it is faster
<Neuro>
which is as stupid as it sounds and totally not how you would do it
in anything real but it is fasterL64[00:33:54] <Kristopher38> Wait what do you mean
"sync with all the others"
<Kristopher38> Wait what do you mean
"sync with all the others"L65[00:34:01] <Neuro> its
a bit wierd
<Neuro> its
a bit wierdL66[00:34:03] <Neuro> but
essentially
<Neuro> but
essentiallyL67[00:34:13] <Neuro>
each gate knows which gates want to go
<Neuro>
each gate knows which gates want to goL68[00:34:31] <Neuro>
they then all figure out who wins, and that gate immediately opens
itself
<Neuro>
they then all figure out who wins, and that gate immediately opens
itselfL69[00:34:49] <Neuro> it
then also broadcasts that it won, which allows every other gate to
update its internal memory and cycle again figuring out who
wins
<Neuro> it
then also broadcasts that it won, which allows every other gate to
update its internal memory and cycle again figuring out who
winsL70[00:34:59] <Neuro>
(wins = gets to open)
<Neuro>
(wins = gets to open)L71[00:35:06] <Kristopher38> What do you mean
"go"
<Kristopher38> What do you mean
"go"L72[00:35:25] <Neuro>
requesting a memory operation (read or write)
<Neuro>
requesting a memory operation (read or write)L73[00:35:28] <Kristopher38> Your terminology is so
confusing sometimes
<Kristopher38> Your terminology is so
confusing sometimesL74[00:35:59] <Neuro>
well, I make all these things up myself
<Neuro>
well, I make all these things up myselfL75[00:36:05] <Neuro> so
I don't really need concrete terminology
<Neuro> so
I don't really need concrete terminologyL76[00:36:14] <Neuro> and
all the terminology I do have is well, made up myself
<Neuro> and
all the terminology I do have is well, made up myselfL77[00:36:41] <Neuro> but
basically the gates control access from these 9 lines to the memory
lines (addr line, input line, output line, and write control)
https://tinyurl.com/yfqaz3ld
<Neuro> but
basically the gates control access from these 9 lines to the memory
lines (addr line, input line, output line, and write control)
https://tinyurl.com/yfqaz3ldL78[00:36:59] <Neuro>
obviously, they need to take turns in some fashion, or things wont
exactly work out
<Neuro>
obviously, they need to take turns in some fashion, or things wont
exactly work outL79[00:38:23] <Neuro>
thats the base level problem at least
<Neuro>
thats the base level problem at leastL80[00:40:33] <Neuro> now
if you use an external controller chip, the flow goes something
like this:
<Neuro> now
if you use an external controller chip, the flow goes something
like this:L81[00:40:33] <Neuro>
chip decides which gate to open and sends signal -> gate opens
(2 ticks) -> memory address decodes (2 ticks) -> memory cell
activates (2 ticks) -> done
<Neuro>
chip decides which gate to open and sends signal -> gate opens
(2 ticks) -> memory address decodes (2 ticks) -> memory cell
activates (2 ticks) -> doneL82[00:41:35] <Neuro> now
if you use an external controller chip, the flow goes something
like this:
<Neuro> now
if you use an external controller chip, the flow goes something
like this:L83[00:41:35] <Neuro>
chip decides which gate to open and sends signal (2 ticks) ->
gate opens (2 ticks) -> memory address decodes (2 ticks) ->
memory cell activates (2 ticks) -> done [Edited]
<Neuro>
chip decides which gate to open and sends signal (2 ticks) ->
gate opens (2 ticks) -> memory address decodes (2 ticks) ->
memory cell activates (2 ticks) -> done [Edited]L84[00:42:31] <Neuro> if
the gates decide for themselves, in a sense, because they share the
IC with the gate circuit and so dont take 2 ticks to get it to
open, saves some ticks
<Neuro> if
the gates decide for themselves, in a sense, because they share the
IC with the gate circuit and so dont take 2 ticks to get it to
open, saves some ticksL85[00:42:55] <Neuro>
(well, 2, to be exact)
<Neuro>
(well, 2, to be exact)L86[00:45:32] <Hawk777> I believe you may
be designing an “arbiter”. That’s a device that accepts a number of
requests and grants exactly one of them at a time.
L87[00:45:32] <Neuro>
technically win signalling isnt even needed: that would have been
really clever and incomprehensibly extra, but didn't turn out to be
possible
<Neuro>
technically win signalling isnt even needed: that would have been
really clever and incomprehensibly extra, but didn't turn out to be
possibleL88[00:45:48] <Neuro>
Sure, sounds like an accurate enough description
<Neuro>
Sure, sounds like an accurate enough descriptionL89[00:46:31] <Hawk777> I made one myself
in a single IC, to ensure that only one power generator at a time
would run since I don’t have transmission/storage capacity for more
than that.
L90[00:46:39] <Neuro> I
mean, I can't think of another way to allow more than one line to
access memory, I have put some thought into somehow having
simultaneous access or some sort of schemas to allow for that/other
weird design decisions, but havent come up with much before
this
<Neuro> I
mean, I can't think of another way to allow more than one line to
access memory, I have put some thought into somehow having
simultaneous access or some sort of schemas to allow for that/other
weird design decisions, but havent come up with much before
thisL91[00:46:55] <Neuro> I
mean, I can't think of another way to allow more than one line to
access memory, I have put *some* thought into somehow having
simultaneous access or some sort of schemas to allow for that/other
weird design decisions, but havent come up with much asides from
this [Edited]
<Neuro> I
mean, I can't think of another way to allow more than one line to
access memory, I have put *some* thought into somehow having
simultaneous access or some sort of schemas to allow for that/other
weird design decisions, but havent come up with much asides from
this [Edited]L92[00:47:35] <Neuro>
this was the arbiter (if you wanna call it that) for the old design
https://tinyurl.com/yfr9g5mc
<Neuro>
this was the arbiter (if you wanna call it that) for the old design
https://tinyurl.com/yfr9g5mcL93[00:48:10] <Neuro> it
used a specific control chip to choose which of four sets of gates
to open (the control chip is the one just a tad left of the
hand)
<Neuro> it
used a specific control chip to choose which of four sets of gates
to open (the control chip is the one just a tad left of the
hand)L94[00:48:52] <Neuro> but
it would be wise to not think of this in non-minecraft (/non
projectred) terms, because in the context of non-minecraft, this
design is incomprehensibly stupid
<Neuro> but
it would be wise to not think of this in non-minecraft (/non
projectred) terms, because in the context of non-minecraft, this
design is incomprehensibly stupidL95[00:49:03] <dequbed> Hawk777: inb4 you
start designing your own hardware to run your own software stack on
since you refuse to make any sort of tradeoff ever. :P
L96[00:49:05] <Neuro>
it's only the quirks of projectred instant ICs that make it an
optimal design
<Neuro>
it's only the quirks of projectred instant ICs that make it an
optimal designL97[00:49:37] <Hawk777> Yep, it is its own
slightly strange world.
L98[00:50:57] <Neuro>
dequbed: I do this for fun, obviously I am gonna push towards new
and strange ways of doing things, especially if I have implemented
a more "traditional" design before
<Neuro>
dequbed: I do this for fun, obviously I am gonna push towards new
and strange ways of doing things, especially if I have implemented
a more "traditional" design beforeL99[00:51:59] <Neuro> and
hey, if they happen to be optimal in the weird and wacky world of
simulated minecraft redstone: even better
<Neuro> and
hey, if they happen to be optimal in the weird and wacky world of
simulated minecraft redstone: even betterL100[00:54:21] <dequbed> Hey if you ever
implement binding in hardware poke me :P
L101[00:54:41] <Neuro> def
binding in this context
<Neuro> def
binding in this contextL102[00:55:02] <dequbed> linking on the
non-existant abstraction level of computing you're working
in.
L103[00:55:29] <Neuro> . .
sorry i'm not smart enough to understand that sentence
<Neuro> . .
sorry i'm not smart enough to understand that sentenceL104[00:55:30] <Neuro>
clearly
<Neuro>
clearlyL105[00:56:08] <dequbed> Linking is the
last step of compilation to get a final loadable process image (or
"executable") out of code.
L106[00:56:57] <Neuro> I'm
not going to be making hardware level compilation lol
<Neuro> I'm
not going to be making hardware level compilation lolL107[00:56:59] <dequbed> But linking
generally works on abstraction levels of like you have an OS and
something that looks almost like a cpu and a main bus if you squint
hard enough.
L108[00:57:37] <Neuro> I
will be writing programs externally, most likely with the help of
some software I will write, compiling that to raw memory, and
writing it to memory via opencomputers
<Neuro> I
will be writing programs externally, most likely with the help of
some software I will write, compiling that to raw memory, and
writing it to memory via opencomputersL109[00:57:44] <Neuro> but
well, that is some ways into the future
<Neuro> but
well, that is some ways into the futureL110[00:57:51] <Neuro> I
will be writing programs externally, most likely with the help of
some software I will write, compiling that to raw memory data, and
writing it to memory via opencomputers [Edited]
<Neuro> I
will be writing programs externally, most likely with the help of
some software I will write, compiling that to raw memory data, and
writing it to memory via opencomputers [Edited]L111[00:57:54] <dequbed> If you work on
abstraction level of "I pay Burroughs several thousand bucks
per month" then you don't have linking, you have binding
:P
L112[00:58:14] <Hawk777> In case you’re
curious, https://paste.pics/c6a85123119c84b1dd554663f8e32156
is my 8-resource arbiter. It’s not quite a traditional arbiter
because each resource has both a request input (I want this) and a
hold input (I want to keep the grant if I have it, but not gain it
if I don’t), but you might get some inspiration.
L113[00:58:31] <Neuro>
what is the double s thing
<Neuro>
what is the double s thingL114[00:58:47] <Neuro> odd
that I dont recognize that cause, well, I have done a lot of
projectred lol
<Neuro> odd
that I dont recognize that cause, well, I have done a lot of
projectred lolL115[00:59:05] <Neuro> the
ones in the second row
<Neuro> the
ones in the second rowL116[00:59:24] <dequbed> alternative
configuration of a SR latch iirc
L117[00:59:32] <Neuro>
lemme check
<Neuro>
lemme checkL118[00:59:41] <Neuro> ah
yeah, weird
<Neuro> ah
yeah, weirdL119[00:59:45] <Neuro>
thanks, it looks cool
<Neuro>
thanks, it looks coolL120[01:00:03] <Neuro> as
mentioned, I have made a traditional 4-resource arbiter before, in
which those output signals would just be sent to IC gates
<Neuro> as
mentioned, I have made a traditional 4-resource arbiter before, in
which those output signals would just be sent to IC gatesL121[01:00:16] <Neuro>
altho it doesn't have "hold" capacity
<Neuro>
altho it doesn't have "hold" capacityL122[01:00:24] <Neuro>
just 4 requests, one output
<Neuro>
just 4 requests, one outputL123[01:00:26] <Neuro> let
me find that
<Neuro> let
me find thatL124[01:01:22] <Neuro> hmm
no, I will need to load the world
<Neuro> hmm
no, I will need to load the worldL125[01:01:38] <Hawk777> Yeah just
requests and grants is the normal case. I just wanted this for my
specific use case.
L126[01:01:44] <Neuro> but
regardless the idea with this design is each individual IC gate has
its own control circuitry and so opens (or doesn't) itself
<Neuro> but
regardless the idea with this design is each individual IC gate has
its own control circuitry and so opens (or doesn't) itselfL127[01:02:44] <Hawk777> Yeah, that makes
sense, it just might be easier to do the arbiter all in one IC
rather than spread out.
L128[01:03:06] <Neuro>
what I cannot figure out is what the decision trigger for your
arbiter is, is it on low of the current grant?
<Neuro>
what I cannot figure out is what the decision trigger for your
arbiter is, is it on low of the current grant?L129[01:03:27] <Neuro>
>Hawk777: Yeah, that makes sense, it just might…
<Neuro>
>Hawk777: Yeah, that makes sense, it just might…L130[01:03:27] <Neuro> oh
it absolutely would be haha. no question there
<Neuro> oh
it absolutely would be haha. no question thereL132[01:03:55] <Hawk777> There’s a timer
over on the far right hand side.
L133[01:04:13] <Neuro> ah
missed that, so time based
<Neuro> ah
missed that, so time basedL134[01:04:18] <Hawk777> Each time the
timer ticks it re-evaluates the situation.
L135[01:04:28] <Neuro>
this one is signal based, and iterates on every high of the bottom
left line
<Neuro>
this one is signal based, and iterates on every high of the bottom
left lineL136[01:04:30] <Hawk777> For me I’m
controlling power generators so the timer ticks every second, which
is far faster than it needs to be.
L137[01:04:39] <Hawk777> But you sound
like you’re building a computer or something, so that’s probably
way too slow.
L138[01:04:58] <Neuro> I
don't use timers or clocks because I'm insane
<Neuro> I
don't use timers or clocks because I'm insaneL139[01:05:20] <Neuro>
only relative delays (like repeaters) or just state based
systems
<Neuro>
only relative delays (like repeaters) or just state based
systemsL140[01:05:34] <Hawk777> Personally I
avoid them as much as I reasonably can, because I assume it’s
possibly maybe more efficient (in terms of lag impact on my
real-world computer), but I use timers if avoiding them would be
too much of a PITA.
L141[01:06:00] <Neuro>
either way this simply round-robins the current requests on every
iteration of the rs input
<Neuro>
either way this simply round-robins the current requests on every
iteration of the rs inputL142[01:06:06] <Amanda> %choose rain box
or continue poking terraform
L143[01:06:07] <MichiBot> Amanda: Haven't
you always gone with "continue poking terraform"? Hm,
maybe not.
L144[01:06:08] <Neuro>
which is an input from the memory control circuitry saying
"done"
<Neuro>
which is an input from the memory control circuitry saying
"done"L145[01:06:50] <Neuro> its
a bit weird of a design and I could probably improve it a lot, made
it a while ago
<Neuro> its
a bit weird of a design and I could probably improve it a lot, made
it a while agoL146[01:06:53] <Neuro> but
it works
<Neuro> but
it worksL147[01:08:03] <Neuro> the
new design is uhh . . insane
<Neuro> the
new design is uhh . . insaneL148[01:08:06] <Hawk777> Fair. My arbiter
I pasted is strict priority (higher wire colours always win in the
case of multiple requests), which is also what I wanted, so that in
the event of a power generation request coming in while multiple
generators were ready to go (i.e. sufficient fuel available), it
would choose the one I want to burn first.
L149[01:08:50] <Neuro> but
essentially the gates each simultaneously figure out whether they
are the rightmost request on this strip https://tinyurl.com/ydkjok73
<Neuro> but
essentially the gates each simultaneously figure out whether they
are the rightmost request on this strip https://tinyurl.com/ydkjok73L150[01:09:09] <Neuro> and
then once the winner wins, the strip is rotated such that they are
on the leftmost spot
<Neuro> and
then once the winner wins, the strip is rotated such that they are
on the leftmost spotL151[01:09:43] <Neuro>
& process repeats
<Neuro>
& process repeatsL152[01:11:11] <Neuro>
(the strip "rotates" as if its two ends were glued
together to form a loop.)
<Neuro>
(the strip "rotates" as if its two ends were glued
together to form a loop.)L153[01:12:29] <Hawk777> Hm, so did you
basically build a copy of the whole arbiter in each chip, and then
only used one of its outputs? I suppose that is one way of not
having a separate arbiter chip :D
L154[01:12:57] <Neuro>
well yes, if you cannot use a second chip, how else is one supposed
to?
<Neuro>
well yes, if you cannot use a second chip, how else is one supposed
to?L155[01:15:07] <Hawk777> I figured it
might be possible to do something like pass summary information
back and forth between chips, something like a loop around which
the grant flows, such that you could make an arbiter of unlimited
length by just stacking individual components side by side.
L156[01:15:22] <Neuro> of
course, but again, propagation delay
<Neuro> of
course, but again, propagation delayL157[01:15:23] <Hawk777> Rather than
having every arbiter evaluate *all* the inputs, it would evaluate
its own, and its neighbours would provide summaries of the
others.
L158[01:15:25] <Hawk777> Yeah, that.
L159[01:15:42] <Hawk777> I never quite
figured out how to do it reliably, and eight inputs was plenty for
me.
L160[01:16:31] <Neuro>
this is a simple arbiter besides, it is only reading ones and
returning a simple output
<Neuro>
this is a simple arbiter besides, it is only reading ones and
returning a simple outputL161[01:16:39] <Neuro> not
evaluating conditions or the like
<Neuro> not
evaluating conditions or the likeL162[01:16:53] <Neuro> or
multiple output allocation or other fancy things that one might
gain some use from
<Neuro> or
multiple output allocation or other fancy things that one might
gain some use fromL163[01:17:01] <Hawk777> Right, I was just
thinking of a way to expand it to more resources than there are
I/Os available in a single IC.
L164[01:17:15] <Neuro>
yes, if you needed to arbitrate that many inputs
<Neuro>
yes, if you needed to arbitrate that many inputsL165[01:17:51] <Neuro>
first thing that comes to mind is simply meta-arbitration but that
is the boring solution
<Neuro>
first thing that comes to mind is simply meta-arbitration but that
is the boring solutionL166[01:18:04] <Neuro> im
sure something clever as you describe could be made to work
<Neuro> im
sure something clever as you describe could be made to workL167[01:19:37] <Hawk777> Meta-arbitration
as in ORing all the requests in a group together, arbitrating the
groups, and ANDing the requests with the group grant before
granting the individual resources?
L168[01:19:58] <Neuro>
yes, just arbitrate which group of inputs to arbitrate first
<Neuro>
yes, just arbitrate which group of inputs to arbitrate firstL169[01:20:09] <Neuro>
then pass that into an individual chip
<Neuro>
then pass that into an individual chipL170[01:20:48] <Hawk777> Still need to be
rather careful about timing, I guess, to avoid races if multiple
inputs go high or low at once, but yeah, I see it could work.
L171[01:21:19] <Neuro>
races are always a problem yeah
<Neuro>
races are always a problem yeahL172[01:21:40] <Neuro> if
I could somehow magic away races the entire design I just described
(the new one) could be approx 100x simpler
<Neuro> if
I could somehow magic away races the entire design I just described
(the new one) could be approx 100x simplerL173[01:21:49] <Neuro> but
I cannot
<Neuro> but
I cannotL174[01:21:56] <Hawk777> If you could
somehow magic away races, I think you could be a very, very rich
person!
L175[01:22:02] <Hawk777> (if you could do
it in real-world programming)
L176[01:22:09] <Neuro>
haha well that too
<Neuro>
haha well that tooL177[01:24:16] <Ocawesome101> solution: cooperative
multitasking, no parallelism whatsoever
<Ocawesome101> solution: cooperative
multitasking, no parallelism whatsoeverL178[01:24:20] <Neuro>
(tbh, it could have been "kicked down the road" in the
sense of kicking it down to the requesting entities, which I could
have build clocks to synchronize or other methods, perhaps even not
requiring any control on the memory side at all, but I decided not
to go that route)
<Neuro>
(tbh, it could have been "kicked down the road" in the
sense of kicking it down to the requesting entities, which I could
have build clocks to synchronize or other methods, perhaps even not
requiring any control on the memory side at all, but I decided not
to go that route)L179[01:24:22] <Ocawesome101> :)
<Ocawesome101> :)L180[01:26:02] <Hawk777> Fair. Cooperative
multitasking magics away the races, while also magicking away the
performance of multicore!
L181[01:26:40] <Neuro> now
the problem is
<Neuro> now
the problem isL182[01:26:56] <Neuro> if
I ever make a third minecraft redstone computer, it's gonna be hard
to top this in terms of ridiculous designs
<Neuro> if
I ever make a third minecraft redstone computer, it's gonna be hard
to top this in terms of ridiculous designsL183[01:27:12] <Hawk777> I am babby. I
have not even made one redstone computer.
L184[01:27:56] <Neuro> I
will probably have to finally find a way to implement my dream of
multiple data accesses being able to happen in parallel
<Neuro> I
will probably have to finally find a way to implement my dream of
multiple data accesses being able to happen in parallelL185[01:28:00] <Neuro>
without strict sectioning/windowing
<Neuro>
without strict sectioning/windowingL186[01:28:25] <Neuro> (ie
they can happen in parallel and the memory ranges they can access
are identical)
<Neuro> (ie
they can happen in parallel and the memory ranges they can access
are identical)L187[01:28:41] <Neuro>
altho dont ask me how the fuck i'm gonna manage that cause I have
no clue
<Neuro>
altho dont ask me how the fuck i'm gonna manage that cause I have
no clueL188[01:29:26] <Hawk777> So, dual-port
RAM?
L189[01:29:46] <Neuro>
obviously the standard row/column address decoding method doesn't
exactly work
<Neuro>
obviously the standard row/column address decoding method doesn't
exactly workL190[01:29:49] <Hawk777> https://en.wikipedia.org/wiki/Dual-ported_RAM
L191[01:30:08] <Neuro>
yes, I know real systems of the type exist
<Neuro>
yes, I know real systems of the type existL192[01:30:12] <Neuro>
don't 100% know how they work tho
<Neuro>
don't 100% know how they work thoL193[01:30:48] <Hawk777> Might be able to
find out.
L194[01:30:51] <Neuro>
(also even the wikipedia page says "nearly at the same
time" so is it really simultaneous or just caching requests
and doing them sequentially lightning fast?)
<Neuro>
(also even the wikipedia page says "nearly at the same
time" so is it really simultaneous or just caching requests
and doing them sequentially lightning fast?)L195[01:31:10] <Hawk777> “at the same
time, or nearly the same time”
L196[01:31:25] <Neuro> Of
course, although I don't like to base my designs on pre-existing
stuff usually
<Neuro> Of
course, although I don't like to base my designs on pre-existing
stuff usuallyL197[01:31:57] <Neuro>
>Hawk777: “at the same time, or nearly the same…
<Neuro>
>Hawk777: “at the same time, or nearly the same…L198[01:31:57] <Neuro>
yeah ofc, but it could be one of those things where the technical
truth has become softened/muddied somewhat, and you get a more
wishy-washy statement like that. I mean, it is a stub, not an
in-depth technical article
<Neuro>
yeah ofc, but it could be one of those things where the technical
truth has become softened/muddied somewhat, and you get a more
wishy-washy statement like that. I mean, it is a stub, not an
in-depth technical articleL199[01:32:22] <Hawk777> I know I have
used some hardware which has dual-ported RAM that, if I remember
correctly, has two separate clock inputs, which can be completely
asynchronous, or could be exactly the same signal, and you can do
the operations on every clock cycle.
L200[01:32:50] <Hawk777> It was a Xilinx
FPGA.
L201[01:32:58] <Neuro> can
it handle collisions? are you expected to manage those on your
own?
<Neuro> can
it handle collisions? are you expected to manage those on your
own?L202[01:33:19] <Hawk777> I can’t remember
what it does if you write to the same address twice at the same
time. It might be undefined, or it might have a defined
result.
L203[01:33:57] <Neuro>
regardless you also have to consider the second part of the
challenge: in minecraft
<Neuro>
regardless you also have to consider the second part of the
challenge: in minecraftL204[01:34:04] <Hawk777> Yes :D
L205[01:34:33] <Neuro> if
I had more than four i/o sides, it is not impossible to envisage a
system whereby you send two separate address encodings through the
same grid, and a chip sends outputs/writes inputs from a pair of
its four sides depending on said input
<Neuro> if
I had more than four i/o sides, it is not impossible to envisage a
system whereby you send two separate address encodings through the
same grid, and a chip sends outputs/writes inputs from a pair of
its four sides depending on said inputL206[01:34:44] <Hawk777> Pretty sure it
*did* have a defined result for reading and writing the same
address at the same time using the same clock signal.
L207[01:34:51] <Neuro> but
well, now I need at least 5 i/o sides, or to store less than 16
bits in the chip
<Neuro> but
well, now I need at least 5 i/o sides, or to store less than 16
bits in the chipL208[01:36:00] <Neuro> I
suppose making such a system even with 8bit (or maybe a
non-standard inter power word length) would still be quite
interesting
<Neuro> I
suppose making such a system even with 8bit (or maybe a
non-standard inter power word length) would still be quite
interestingL209[01:36:39] <Neuro>
infact no it would be trivial since you could just use high/low of
each 16bit bus for each channel
<Neuro>
infact no it would be trivial since you could just use high/low of
each 16bit bus for each channelL210[01:36:47] <Neuro>
well no, trivial is a bit much phaps
<Neuro>
well no, trivial is a bit much phapsL211[01:36:53] <Neuro> but
can vaguely map it out
<Neuro> but
can vaguely map it outL212[01:37:14] <Neuro>
would also still have conflict problems
<Neuro>
would also still have conflict problemsL213[01:37:48] <Neuro>
although I suppose there is no right answer in a conflict anyway so
you only need to define a consistent outcome, which is also not too
hard
<Neuro>
although I suppose there is no right answer in a conflict anyway so
you only need to define a consistent outcome, which is also not too
hardL214[01:38:40] <Hawk777> Or define it as
undefined behaviour!
L215[01:38:52] <Neuro>
yes, the easy way out. haha
<Neuro>
yes, the easy way out. hahaL216[01:38:52] <Hawk777> After all, it
would be rare that software would want to do that and rely on a
useful outcome.
L217[01:39:12] <Neuro> one
of those things where you can pass the buck to the programmer
haha
<Neuro> one
of those things where you can pass the buck to the programmer
hahaL218[01:40:11] <Hawk777> Minecraft is much
nicer than real life in one way, namely the entire universe has a
single discrete timebase—no asynchronous clocks, no metastability,
etc..
L219[01:41:37] <Neuro> I
was thinking, when I was originally designing the general layout of
the computer (which, if it means anything to you, dequbed described
as some kind of CPLD) that like "wait, this could enter
infinite loops and the like really easily" and then I was like
"wait but I suppose you can also trivially program infinite
loops into C, so it's just on the programmer to well, not write
infinite loops (or on the compiler to not generate them"
<Neuro> I
was thinking, when I was originally designing the general layout of
the computer (which, if it means anything to you, dequbed described
as some kind of CPLD) that like "wait, this could enter
infinite loops and the like really easily" and then I was like
"wait but I suppose you can also trivially program infinite
loops into C, so it's just on the programmer to well, not write
infinite loops (or on the compiler to not generate them"L220[01:41:56] <Hawk777> hahaha
L221[01:42:17] <Hawk777> Hm, I have not
used a CPLD myself, but I understand they are quite similar to
FPGAs, which sounds fun.
L222[01:43:27] <Neuro> the
design is just an 8 by 8 grid of individual processing units which
receive and send data to one another
<Neuro> the
design is just an 8 by 8 grid of individual processing units which
receive and send data to one anotherL223[01:44:12] <Hawk777> Reminded of
TIS-100, a grid of simple processing units with interconnect!
L224[01:44:31] <Neuro>
TIS-100 is amazing
<Neuro>
TIS-100 is amazingL225[01:44:47] <Neuro>
although, ironically, I do not remember being particularly inspired
by it
<Neuro>
although, ironically, I do not remember being particularly inspired
by itL226[01:44:48] ⇦
Quits: Inari (~Pinkishu@p4fd95b4d.dip0.t-ipconnect.de) (Quit: KVIrc
5.0.0 Aria http://www.kvirc.net/)
L227[01:45:02] <Neuro> I
was mainly thinking along the lines of like, how to create
something, hmm, instruction efficient
<Neuro> I
was mainly thinking along the lines of like, how to create
something, hmm, instruction efficientL228[01:45:33] <Neuro>
because a cell can of course implement its instruction many to
infinite times in a row
<Neuro>
because a cell can of course implement its instruction many to
infinite times in a rowL229[01:45:57] <Neuro> as
a whole probably more analogous to a co-processing chip than a CPU
as you would know it
<Neuro> as
a whole probably more analogous to a co-processing chip than a CPU
as you would know itL230[01:46:00] <Hawk777> I think my only
annoyance with TIS-100 was the fact that comments count against
code size and you sometimes have to write really short jump target
labels to fit them plus an instruction within a line.
L231[01:46:04] <Hawk777> Other than that I
loved it.
L232[01:46:31] <Neuro> I
don't think i've disliked a single zachtronics game
<Neuro> I
don't think i've disliked a single zachtronics gameL233[01:47:28] <Neuro>
shenzhen io is great, exapunks is great, opus magnum is great
(altho mega cheesable but lets not get into that), tis-100 is
great, spacechem is great (at turning your brain into mush)
etc
<Neuro>
shenzhen io is great, exapunks is great, opus magnum is great
(altho mega cheesable but lets not get into that), tis-100 is
great, spacechem is great (at turning your brain into mush)
etcL234[01:48:33] <Hawk777> I played a bit of
Shenzhen I/O, a fair bit of Opus Magnum, and all of TIS-100 with
the possible exception of one of the additional library challenges
(can’t remember if I eventually solved it much later, or never).
All fun!
L235[01:48:35] <Neuro> oh
i forgot infinifactory
<Neuro> oh
i forgot infinifactoryL236[01:48:36] <Neuro>
also great
<Neuro>
also greatL237[01:49:34] <Neuro>
(the opus magnum cheese btw is a flaw in how the "generate an
infinite chain" missions are set up, which lets you do
funny/fucky things)
<Neuro>
(the opus magnum cheese btw is a flaw in how the "generate an
infinite chain" missions are set up, which lets you do
funny/fucky things)L239[01:49:38] <MichiBot> Opus Magnum-
Armor Fillament- Restricted Solution | length: 1m 4s |
Likes: 6 Dislikes: 0 Views: 590 | by Riokaii |
Published On 5/11/2017
L240[01:51:15] <Neuro> it
thinks the chain is being endlessly added onto because each time it
passes the output block it is longer by one
<Neuro> it
thinks the chain is being endlessly added onto because each time it
passes the output block it is longer by oneL241[01:51:28] <Neuro> and
then once it detects that enough times its like: "ok you
win"
<Neuro> and
then once it detects that enough times its like: "ok you
win"L242[01:51:45] <Neuro>
honestly hilarious
<Neuro>
honestly hilariousL243[01:55:49] <Hawk777> hahahaha
L244[02:00:30] <Neuro>
>Hawk777: I think my only annoyance with TIS-10…
<Neuro>
>Hawk777: I think my only annoyance with TIS-10…L245[02:00:31] <Neuro>
exapunks is like this too
<Neuro>
exapunks is like this tooL246[02:00:43] <Neuro>
having to make the names of everything really short of character
restriction reasons
<Neuro>
having to make the names of everything really short of character
restriction reasonsL247[02:00:46] <Neuro> bit
irritating
<Neuro> bit
irritatingL248[02:01:16] <Neuro>
pretty much all your "JMP X" need to be single character
otherwise it gets tough
<Neuro>
pretty much all your "JMP X" need to be single character
otherwise it gets toughL249[02:01:30] <Hawk777> Yeah, I’m mainly
annoyed by it because it’s unrealistic. Comments get removed by the
compiler or assembler—you can write an essay in comments and it
doesn’t affect the generated machine code. Same with labels.
L250[02:02:16] <Neuro>
yes, ofc
<Neuro>
yes, ofcL251[02:03:02] <Neuro> I
guess you could say the TIS (and uh, whatever the exapunk bot
thingies are) dont have compilers (or have comically minimal ones)
and you are writing just like raw instructions
<Neuro> I
guess you could say the TIS (and uh, whatever the exapunk bot
thingies are) dont have compilers (or have comically minimal ones)
and you are writing just like raw instructionsL252[02:03:43] <Neuro>
that said, I suppose realism is not the ultimate goal. I think most
people here can attest that Spacechem isn't how chemistry
ultimately works 😛
<Neuro>
that said, I suppose realism is not the ultimate goal. I think most
people here can attest that Spacechem isn't how chemistry
ultimately works 😛L253[02:04:07] <Neuro>
(well, maybe oneday)
<Neuro>
(well, maybe oneday)L254[02:04:13] <Hawk777> I suppose it
could be something more like an interpreted language.
L255[02:05:03] <Hawk777> But… an
interpreted language, that looks like assembly language, that runs
on a raw CPU… weird :D
L256[02:18:29] <Kristopher38> One like and I'm doing
native lua CPU for an fpga course project
<Kristopher38> One like and I'm doing
native lua CPU for an fpga course projectL257[02:20:16] <Hawk777> WAT
L258[02:20:28] <Hawk777> A CPU that
natively executes text seems… really really crazy.
L259[02:20:43] <Hawk777> Unless you mean
binary Lua?
L260[02:20:59] <Neuro> I
imagine almost certainly they mean some sort of binary compiled
lua
<Neuro> I
imagine almost certainly they mean some sort of binary compiled
luaL261[02:21:07] <Kristopher38> No I mean lua
bytecode
<Kristopher38> No I mean lua
bytecodeL262[02:21:10] <Neuro>
also there's your like
<Neuro>
also there's your likeL263[02:21:11] <Neuro>
have fun
<Neuro>
have funL264[02:21:39] <Hawk777> Ah OK.
L265[02:22:08] <Hawk777> Anyone remember
Jazelle, the execution mode of ARM CPUs that would execute Java
bytecode?
L266[02:23:24] <Kristopher38> At least I'd want to have
it work as some sort of accelerator, where the CPU requests to run
some Lua code and the FPGA does it
<Kristopher38> At least I'd want to have
it work as some sort of accelerator, where the CPU requests to run
some Lua code and the FPGA does itL267[02:23:40] <Kristopher38> With at least some opcodes
supported
<Kristopher38> With at least some opcodes
supportedL268[02:24:31] <Hawk777> Apparently,
though little is publicly documented, that’s pretty much how
Jazelle worked. The CPU implemented some instructions and gave up
and let the software implement others.
L269[02:24:31] <Neuro>
>Hawk777: Anyone remember Jazelle, the executio…
<Neuro>
>Hawk777: Anyone remember Jazelle, the executio…L270[02:24:31] <Neuro>
sounds like a mess, reads like a mess haha
<Neuro>
sounds like a mess, reads like a mess hahaL271[02:25:23] <Neuro>
honestly its even wierder than youd expect upon reading about
it
<Neuro>
honestly its even wierder than youd expect upon reading about
itL272[02:25:27] <Neuro>
assuming wikipedia is correct
<Neuro>
assuming wikipedia is correctL273[02:25:54] <Hawk777> It seems
absolutely insane to me to go to all the effort of implementing a
bunch of hardware in a CPU, but then not document it
publicly.
L274[02:26:02] <Neuro> it
was a sort of extension to the main control flow by having a branch
instruction that would branch somewhere then attempt to execute the
branch as java
<Neuro> it
was a sort of extension to the main control flow by having a branch
instruction that would branch somewhere then attempt to execute the
branch as javaL275[02:26:35] <Hawk777> Well, that is
also how you switch between e.g. ARM and Thumb modes (an
interworking branch instruction), so not super weird.
L276[02:26:59] <Mimiru> %test
L277[02:26:59] <MichiBot> Mimiru:
Success
L278[02:27:03] <Michiyo>
%test
<Michiyo>
%testL279[02:27:03] <MichiBot> Michiyo:
No.
L280[02:27:09] <Mimiru> Ok, still looks
good.
L281[02:27:20] <Amanda> %give MichiBot a
tattoo gun loaded with cat scent
L282[02:27:22] *
MichiBot accepts the tattoo gun loaded with cat scent and adds it
to her inventory
L283[02:27:37] <Mimiru> mmhmm....
L284[02:27:40] <Neuro>
true although arm to thumb is a bit less complex than arm to
java
<Neuro>
true although arm to thumb is a bit less complex than arm to
javaL285[02:27:41] <Neuro>
lol
<Neuro>
lolL286[02:27:45] *
Amanda curls up around Elfi, goes to poke some animals
L287[02:59:29] <Kristopher38> @Neuro correct me if I'm
wrong, but you don't use clocks since redstone is synchronous
anyway, right?
<Kristopher38> @Neuro correct me if I'm
wrong, but you don't use clocks since redstone is synchronous
anyway, right?L288[02:59:39] <Neuro>
yes
<Neuro>
yesL289[02:59:46] <Neuro>
well, yes and no
<Neuro>
well, yes and noL290[02:59:55] <Neuro> I
still like to build signal instead of timing based
<Neuro> I
still like to build signal instead of timing basedL291[03:00:06] <Neuro>
that is to say, something might send a signal saying "im
done" and then the process advances
<Neuro>
that is to say, something might send a signal saying "im
done" and then the process advancesL292[03:00:21] <Neuro> you
can technically make everything just timings but its a bit
boring
<Neuro> you
can technically make everything just timings but its a bit
boringL293[03:00:39] <Neuro> but
yeah, stuff i want fast, like memory, is gonna be based on
timings
<Neuro> but
yeah, stuff i want fast, like memory, is gonna be based on
timingsL294[03:01:02] <Neuro> and
you can build clocked redstone computers, one of the few people to
actually build a fabrication minecraft computer was a clocked
one
<Neuro> and
you can build clocked redstone computers, one of the few people to
actually build a fabrication minecraft computer was a clocked
oneL295[03:01:11] <Neuro>
pipe told me about it ages ago, not gonna bother digging it up
sorry
<Neuro>
pipe told me about it ages ago, not gonna bother digging it up
sorryL296[03:05:46] <Neuro>
this design also does have a "clock" of sorts but its
more for synchronizing specific aspects of different elements
<Neuro>
this design also does have a "clock" of sorts but its
more for synchronizing specific aspects of different elementsL297[03:06:02] <Neuro>
(specifically writeops between cells)
<Neuro>
(specifically writeops between cells)L298[03:06:08] <Neuro> so
not something the entire machine runs on
<Neuro> so
not something the entire machine runs onL299[03:07:16] <Kristopher38> I see, so some sync is
needed but not a global clock
<Kristopher38> I see, so some sync is
needed but not a global clockL300[03:07:29] <Neuro>
yeah, original design didnt have one
<Neuro>
yeah, original design didnt have oneL301[03:07:31] <Neuro>
then I added one in
<Neuro>
then I added one inL302[03:07:35] <CompanionCube> dequbed:
...burroughs? i associate that name with weird old mainframes
emulated on modern systemd
L303[03:08:17] <Neuro>
then I added one in/more like realized it was necessary
[Edited]
<Neuro>
then I added one in/more like realized it was necessary
[Edited]L304[03:09:10] <Neuro>
Then i toyed with removing it as you can see lol
<Neuro>
Then i toyed with removing it as you can see lolL306[03:09:27] <Izaya> > emulated on
modern systemd
L307[03:09:31] <Izaya> pls elaborate
L308[03:09:39] <Neuro> in
the end I decided to keep it but slightly altered
<Neuro> in
the end I decided to keep it but slightly alteredL309[03:10:09] <Neuro>
making a design without it would 100% be possible, just a bit
messy
<Neuro>
making a design without it would 100% be possible, just a bit
messyL310[03:10:21] <CompanionCube> Izaya: iirc
literally just an emulator on x86
L311[03:10:35] <Izaya> oh
L312[03:10:38] <Izaya> why?
L313[03:10:45] <Neuro>
also, as always, would have needed more bits. lmao
<Neuro>
also, as always, would have needed more bits. lmaoL314[03:10:47] <Izaya> also I imagine simh
could do that
L315[03:11:27] <CompanionCube> ah
yes
L316[03:11:41] <CompanionCube> burroughs
is called unisys now
L317[03:12:20] <Neuro>
>Neuro: also, as always, would have needed mo…
<Neuro>
>Neuro: also, as always, would have needed mo…L318[03:12:21] <Neuro> I
dont have a spare bit on the inter-cell talk line for
"row/column in use" is the problem
<Neuro> I
dont have a spare bit on the inter-cell talk line for
"row/column in use" is the problemL319[03:12:36] <Neuro> so
a synchronizing clock that makes sure sends only happen one after
the other is needed
<Neuro> so
a synchronizing clock that makes sure sends only happen one after
the other is neededL320[03:12:49] <Neuro> it
also helps make a bunch of other things not super messy
<Neuro> it
also helps make a bunch of other things not super messyL321[03:13:33] <Neuro>
unfortunately propagation delay makes the clock unavoidably slow
altho I have some planned alternate clock modes for dealing with
stuff like that
<Neuro>
unfortunately propagation delay makes the clock unavoidably slow
altho I have some planned alternate clock modes for dealing with
stuff like thatL322[03:14:13] <CompanionCube> Izaya:
https://en.wikipedia.org/wiki/Burroughs_large_systems
yeah, latest models use Xeons.
L323[03:14:51] <Neuro> so
now I get to know what dequbed was talking about
<Neuro> so
now I get to know what dequbed was talking aboutL324[03:14:52] <Neuro>
lol
<Neuro>
lolL325[03:15:55] <CompanionCube> probably
just a coincidence
L326[03:16:03] <Izaya> disappointing, but
I guess everyone converges on IBM PC clones eventually
L327[03:16:30] <Neuro> the
IBM PC cycle
<Neuro> the
IBM PC cycleL328[03:16:36] <Neuro>
there is only one step
<Neuro>
there is only one stepL329[03:16:38] <CompanionCube> Izaya: on
the plus side it does mean they offer a free downloadable
version...
L330[03:16:46] <Neuro> and
it is IBM PC
<Neuro> and
it is IBM PCL331[03:17:07] <CompanionCube> iirc this
is also one of those very rare platforms where two's complement
isn't a thing
L332[03:34:49] <Neuro>
aaaagh
<Neuro>
aaaaghL333[03:35:00] <Neuro>
still havent cracked these stupid gate arbitrator thingys
<Neuro>
still havent cracked these stupid gate arbitrator thingysL334[03:35:14] <Neuro>
close, very close, but yet so far
<Neuro>
close, very close, but yet so farL335[03:35:17] <Neuro>
well, anyway. sleep time.
<Neuro>
well, anyway. sleep time.L336[03:35:35] <Neuro> it
is like, too late AM rn
<Neuro> it
is like, too late AM rnL337[04:02:45] *
Amanda stops bothering the forest animals, uses elfi as a pillow
and zzzmews
L338[04:02:52] <Amanda> Night nerds
L339[04:16:56] <Vaur>
%tonk
<Vaur>
%tonkL340[04:16:58] <MichiBot> Dad-Sizzle!
Vaur! You beat Forecaster's previous record of <0 (By 9 hours,
1 minute and 42 seconds)! I hope you're happy!
L341[04:16:59] <MichiBot> Vaur's new
record is 9 hours, 1 minute and 42 seconds! Vaur also gained
0.00903 tonk points for stealing the tonk. Position #1.
L342[06:35:51] <lunar_sam> https://xmpp.icbmlaunch.site/upload/biQNNEijiZ0APhAM/7538bb58-c924-457e-a68b-7e01e5cb467b.png
L343[06:47:09] <SnailDOS>
boeng
<SnailDOS>
boengL344[07:16:39] <Izaya> boing
L345[07:17:39] <Ariri>
bung
<Ariri>
bungL346[07:50:58] <Ashirg>
%sip
<Ashirg>
%sipL347[07:50:59] <MichiBot> You drink a
fragrant honey potion (New!). Ashirg looks confused as nothing
happens.
L348[07:51:22] <Vaur>
%sip
<Vaur>
%sipL349[07:51:23] <MichiBot> You drink a
forked white potion (New!). Vaur turns into a sapphire unicorn boy
until they see a star fall.
L350[08:07:28] ⇦
Quits: Hawk777 (~chead@2607:c000:8274:b100:cdca:bac8:814c:86ad)
(Quit: Leaving.)
L351[08:15:43] <Ashirg>
%sip
<Ashirg>
%sipL352[08:15:44] <MichiBot> You drink a
fiery tomato potion (New!). A bard starts playing a lute behind
Ashirg until they have a nap.
L353[08:29:56] <Vaur>
%sip
<Vaur>
%sipL354[08:29:57] <MichiBot> You drink a
smooth tomato potion (New!). After the first sip the potion poofs
away.
L355[09:26:14] <Ashirg>
%sip
<Ashirg>
%sipL356[09:26:15] <MichiBot> You drink a
hairy platinum potion (New!). It tastes bitter.
L357[10:15:23]
⇨ Joins: Inari
(~Pinkishu@p508efb94.dip0.t-ipconnect.de)
L358[11:24:30] ⇦
Quits: lordpipe (~ba7888b72@66.109.211.50) (Ping timeout: 195
seconds)
L359[11:24:52]
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L360[11:32:28]
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(~Vexatos@port-92-192-131-75.dynamic.as20676.net)
L361[11:32:28]
zsh sets mode: +v on Vexatos
L362[11:55:09] <Ashirg>
%sip
<Ashirg>
%sipL363[11:55:10] <MichiBot> You drink a
salty orange potion (New!). Ashirg turns into a sword horse until
they have A Seeping Aegisalt potion.
L364[12:04:34] <Vaur>
%sip
<Vaur>
%sipL365[12:04:34] <MichiBot> You drink a
cloudy lime potion (New!). Vaur shrinks by a negligible amount
until someone looks at them.
L366[12:08:26] <Ashirg>
%sip
<Ashirg>
%sipL367[12:08:27] <MichiBot> You drink a
smooth rubium potion (New!). Ashirg barely manages to catch a red
shell that appears in front of them!
L368[12:12:56] <Forecaster> %sip smooth rubium
potion
<Forecaster> %sip smooth rubium
potionL369[12:12:58] <MichiBot> You drink a
smooth rubium potion. Forecaster barely manages to catch a red
shell that appears in front of them!
L370[12:13:04] <Forecaster> %redshell Vaur
<Forecaster> %redshell VaurL371[12:13:08] <MichiBot> Forecaster:
Unfortunately you missed with a 13 vs 14.
L372[12:13:13] <Forecaster> dammit!
<Forecaster> dammit!L373[12:13:53] <Forecaster> %shellcount
<Forecaster> %shellcountL374[12:13:54] <MichiBot> Forecaster: You
have 1 Blue Shell, 0 Red Shells, 0 Green Shells, and 2 Bricks
L375[12:28:18] <Vaur>
%sip
<Vaur>
%sipL376[12:28:18] <MichiBot> You drink a
silent coral potion (New!). Vaur's bed is suddenly slightly less
comfortable until they use "Crystal Nice" in a
sentence.
L377[13:20:38] <Forecaster> %tonk
<Forecaster> %tonkL378[13:20:40] <MichiBot> Boom!
Forecaster! You beat Vaur's previous record of 9 hours, 1 minute
and 42 seconds (By 2 minutes)! I hope you're happy!
L379[13:20:41] <MichiBot> Forecaster's new
record is 9 hours, 3 minutes and 42 seconds! Forecaster also gained
0.0003 (0.00003 x 10) tonk points for stealing the tonk. Position
#2. Need 0.48808254 more points to pass Vaur!
L380[13:28:55]
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(~Renari@64.67.31.239.res-cmts.bgr.ptd.net)
L381[13:30:53] ⇦
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timeout: 192 seconds)
L382[13:39:15] ⇦
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timeout: 195 seconds)
L383[14:00:50] ⇦
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timeout: 189 seconds)
L384[14:01:10]
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(~Renari@64.67.31.239.res-cmts.bgr.ptd.net)
L385[14:16:41]
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(~ben_mkiv@2001:16b8:1e99:3300:fe34:97ff:fea9:75f2)
L386[14:22:31] <basgamer999> Can I get the invite
somewhere!
<basgamer999> Can I get the invite
somewhere!L387[14:22:35] <basgamer999> Can I get the invite
somewhere? [Edited]
<basgamer999> Can I get the invite
somewhere? [Edited]L388[14:26:43] <Ashirg>
%sip Seeping Aegisalt potion
<Ashirg>
%sip Seeping Aegisalt potionL389[14:26:44] <MichiBot> You drink a
seeping aegisalt potion (New!). After drinking the potion Ashirg
notices a label that says "Side effects may include giggle
fits and excessive monologuing."
L390[14:28:18] *
Amanda checks on Elfi among her floof, making sure she didn't
violate the rent agreement by building a patio or
anything
L391[14:29:11] *
Elfi is burrowed in floof with her laptop and a sketchbook instead,
was too busy gamejamming to get into other mischief,
zzzz
L392[14:29:42] *
Amanda giggles, beams some snacks for elfi and a glass of water
next to herseelf
L393[14:53:53] <dequbed> CompanionCube:
This association would be correct. Burroughs aka the largest of the
six dwarves of mainframe business. You may know them from the
Burroughs Large Systems Architecture.
L394[14:57:06] <dequbed> Izaya: To
elaborate on what CompanionCube already explained: a) because
mainframes are stupid and a solution to a problem that should no
longer exist. b) calling Mainframe emulators an "IBM PC
clone" is an insult to the immense amount of engineering that
went into them
L395[15:54:35]
⇨ Joins: djbjhfy
(~djbjhfy@pool-100-15-96-211.washdc.fios.verizon.net)
L396[16:03:37] ⇦
Quits: djbjhfy
(~djbjhfy@pool-100-15-96-211.washdc.fios.verizon.net) (Quit:
Quit)
L397[16:23:47] ⇦
Quits: ben_mkiv (~ben_mkiv@2001:16b8:1e99:3300:fe34:97ff:fea9:75f2)
(Quit: Leaving)
L398[16:32:19] <Neuro> .
.
<Neuro> .
.L399[16:32:38] <Neuro> of
course the entirely illogical problem I was attempting to solve
randomly disappears on relog
<Neuro> of
course the entirely illogical problem I was attempting to solve
randomly disappears on relogL400[16:32:52] <Forecaster> hooray
<Forecaster> hoorayL401[16:33:56] <Neuro> lol
nope actually, it just decided to not appear the first time I tried
after relog
<Neuro> lol
nope actually, it just decided to not appear the first time I tried
after relogL402[16:34:06] <Forecaster> hooray
<Forecaster> hoorayL403[16:34:14] <Neuro> was
consistent before tho
<Neuro> was
consistent before thoL404[16:36:57] <Neuro>
gonna try one of those classic fixes that have no logical reason to
work but uhh, maybe?
<Neuro>
gonna try one of those classic fixes that have no logical reason to
work but uhh, maybe?L405[17:01:42] <CyborgPotato> %tonk
<CyborgPotato> %tonkL406[17:01:42] <MichiBot> I'm sorry
CyborgPotato, you were not able to beat Forecaster's record of 9
hours, 3 minutes and 42 seconds this time. 3 hours, 41 minutes and
2 seconds were wasted! Missed by 5 hours, 22 minutes and 39
seconds!
L407[17:07:25] ⇦
Quits: dmod (sid32492@ilkley.irccloud.com) (Remote host closed the
connection)
L408[17:07:25] ⇦
Quits: Guest90172 (sid32492@ilkley.irccloud.com) (Remote host
closed the connection)
L409[17:09:05] <Amanda> %choose seperate
IoT SSID or just segment them once connected
L410[17:09:06] <MichiBot> Amanda: I've
heard "seperate IoT SSID" is in these days
L411[17:19:14] ⇦
Quits: Teris (sid315557@helmsley.irccloud.com) (Ping timeout: 189
seconds)
L412[17:47:59]
⇨ Joins: ben_mkiv
(~ben_mkiv@2001:16b8:1494:6900:fe34:97ff:fea9:75f2)
L413[17:54:18] <Izaya> Ariri, lunar_sam:
https://ahhhhhh.social/media/cc79dc5c-f880-46be-8edb-eb0fafebff30/image.png
L414[17:54:48] <Izaya> dequbed: my point
was it's disappointing that the hardware was gone. Emulators for
old machines is always neat though.
L415[18:26:56] <dequbed> Izaya: I mean the
hardware isn't "gone". Its just now using modern day
hardware instead of decades outdated architectures designed for a
completely different world of chip and electronics
manufacture.
L416[18:34:40] *
CompanionCube associates dequbed with high-performance things so
the link with the e.g. b5000 was unexpected.
L417[18:39:49] <dequbed> CompanionCube:
High-Performance and to a degree high-availability, which is mostly
why I'm aware of the tech below mainframes. But what I do is more
stuff like Erlang.
L418[18:54:44]
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(sid32492@id-32492.ilkley.irccloud.com)
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(sid32492@id-32492.ilkley.irccloud.com)
L420[18:58:16] <Senliast>
where can i find a list with key codes for the programming
language?
<Senliast>
where can i find a list with key codes for the programming
language?L421[18:59:32] <Neuro> key
codes?
<Neuro> key
codes?L422[19:00:09] <Forecaster> `string.byte("a")`
gets you the character code
<Forecaster> `string.byte("a")`
gets you the character codeL423[19:00:59]
⇨ Joins: Teris
(sid315557@id-315557.helmsley.irccloud.com)
L424[19:01:33] <Senliast>
i mean, key codes for detecting key presses, like 28 for enter,
etc.
<Senliast>
i mean, key codes for detecting key presses, like 28 for enter,
etc.L425[19:01:51] <Senliast>
i need to detect spacebar press event
<Senliast>
i need to detect spacebar press eventL426[19:02:31] <Forecaster> see above, or make something
that catches the event and prints the code, then press the
button
<Forecaster> see above, or make something
that catches the event and prints the code, then press the
buttonL427[19:02:34] <Ocawesome101> the `key_down` event
returns both the character code and the scancode
<Ocawesome101> the `key_down` event
returns both the character code and the scancodeL428[19:02:34] <Forecaster> or use dmesg
<Forecaster> or use dmesgL429[19:02:49] <Senliast>
ok, i will try...
<Senliast>
ok, i will try...L430[19:02:49] <Ocawesome101> so you can just check for
character 32
<Ocawesome101> so you can just check for
character 32L431[19:03:13] <Forecaster> key codes aren't language
specific by the way
<Forecaster> key codes aren't language
specific by the wayL432[19:05:31] <Senliast>
you have right, i just set up the "key_down" event and
let the e4 show, for spacebar it was 57, thanks!
<Senliast>
you have right, i just set up the "key_down" event and
let the e4 show, for spacebar it was 57, thanks!L433[19:07:56] <Ocawesome101> don't use that one
<Ocawesome101> don't use that oneL434[19:07:58] <Ocawesome101> use the other one
<Ocawesome101> use the other oneL435[19:08:02] <Ocawesome101> e3 i think
<Ocawesome101> e3 i thinkL436[19:08:24] <Ocawesome101> otherwise if OC ever gets
updated to 1.13+ your program will break (if that's a concern -
which tbh it probably isn't)
<Ocawesome101> otherwise if OC ever gets
updated to 1.13+ your program will break (if that's a concern -
which tbh it probably isn't)L437[19:52:15] ⇦
Quits: TPG24 (~ThePiGuy2@host-92-17-127-228.as13285.net) (Ping
timeout: 192 seconds)
L438[20:08:20]
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(~ThePiGuy2@host-92-17-127-228.as13285.net)
L439[20:08:52] <Forecaster> %sip
<Forecaster> %sipL440[20:08:53] <MichiBot> You drink a
boiling weather potion (New!). Gravity reverses for Forecaster
until they see a star fall.
L441[20:09:00] <Forecaster> oh dear
<Forecaster> oh dearL442[20:11:04] <Ashirg>
%sip
<Ashirg>
%sipL443[20:11:05] <MichiBot> You drink a
sweet weather potion (New!). Ashirg gains an additional bone.
L444[20:11:10] <Ashirg>
Elfi do be cute tho
<Ashirg>
Elfi do be cute thoL445[20:25:45]
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L446[20:26:16] ⇦
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(Remote host closed the connection)
L447[20:26:38]
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L448[20:27:20] ⇦
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timeout: 189 seconds)
L451[20:46:29] <Saghetti>
pcb i made
<Saghetti>
pcb i madeL452[20:47:16] <Saghetti>
this is a hardware password manager
<Saghetti>
this is a hardware password managerL453[20:48:18] <Saghetti>
basically a yubikey but for 2fa and password storage
<Saghetti>
basically a yubikey but for 2fa and password storageL454[20:48:27] <Ocawesome101> neat
<Ocawesome101> neatL455[20:52:10] <Neuro>
neat
<Neuro>
neatL456[20:59:42] <lunar_sam>
man
<lunar_sam>
manL457[20:59:48] <lunar_sam>
i wanna make custom PCBs and whatnot
<lunar_sam>
i wanna make custom PCBs and whatnotL458[20:59:52] <lunar_sam>
have a few fun ideas
<lunar_sam>
have a few fun ideasL459[20:59:55] <lunar_sam>
mostly dumb stuff
<lunar_sam>
mostly dumb stuffL460[21:00:26] <lunar_sam>
one was just
<lunar_sam>
one was justL461[21:00:28] <lunar_sam>
really dumb
<lunar_sam>
really dumbL462[21:00:36] <lunar_sam>
icekey in discrete ICs
<lunar_sam>
icekey in discrete ICsL463[21:03:28] <Vaur>
%sip
<Vaur>
%sipL464[21:03:29] <MichiBot> You drink a
porous rainbow potion (New!). Vaur turns into an adamantium goat
frog boy until the next time they hug someone.
L466[21:34:03] <Ariri>
true
<Ariri>
trueL467[21:38:09] <lunar_sam>
i love when my missiles fuck off to heaven in AC7
<lunar_sam>
i love when my missiles fuck off to heaven in AC7L468[22:02:18] <Amanda> %choose halucinate
or continue poking the editor window
L469[22:02:18] <MichiBot> Amanda: The
sands of time whisper to me... they're saying
"halucinate".
L470[22:12:12] <lunar_sam>
i feel
<lunar_sam>
i feelL471[22:12:13] <lunar_sam>
very smug now
<lunar_sam>
very smug nowL473[23:00:42] <Amanda> Elfi! Elfi!
Lookit, I made a fairy-sized foxgirl! ~pushes Inari out of her
hiding spot~
L474[23:00:48] <Elfi> :O
L475[23:00:53] <Elfi> She's tiny
L476[23:01:07] <Elfi> And bulliable
>:3c
L477[23:08:43] <Inari> rude
L478[23:08:51] <Inari> %splash
Amanda
L479[23:08:52] <MichiBot> You fling a
smooth coral potion (New!) that splashes onto Amanda. An Apple
sword appears next to Amanda.
L480[23:09:21] *
Amanda noms the sword, to tell the audiance she's an even bigger
asshole
L481[23:25:27] ⇦
Quits: Mimiru (~Michi@50.38.53.215) (Quit: Leaving)
L482[23:25:46]
⇨ Joins: Michi (~Michi@50.38.53.215)
L483[23:25:48] <Michi> damn it
L484[23:26:34]
zsh sets mode: +o on Michi
L485[23:30:01] ⇦
Quits: Inari (~Pinkishu@p508efb94.dip0.t-ipconnect.de) (Quit: KVIrc
5.0.0 Aria http://www.kvirc.net/)
L486[23:30:40] <Forecaster> %tonk and %sip
<Forecaster> %tonk and %sipL487[23:30:40] <MichiBot> I'm sorry
Forecaster, you were not able to beat Forecaster's record of 9
hours, 3 minutes and 42 seconds this time. 6 hours, 28 minutes and
58 seconds were wasted! Missed by 2 hours, 34 minutes and 44
seconds!
L488[23:30:41] <MichiBot> You drink a
liquid violium potion (New!). Forecaster feels a sudden surge of
static electricity.
L489[23:41:00] <Vaur>
%sip
<Vaur>
%sipL490[23:41:01] <MichiBot> You drink a
still electrum potion (New!). Vaur's nails turn the color of
dilithium until they see a bird.
L491[23:42:38] <Amanda> Michi: wrong
button?
L492[23:43:34] <Michi> Tried to open a 2nd
connection, instead opened said connection here