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L1[00:05:34] <Ne​uro> wow ten minutes . . this is gonna be a bomb when it drops
L2[00:05:38] <Kristo​pher38> so hear me out, the point in doing this is that now the programmer doesn't have to worry about allocating instructions to execution units, instead if you somehow manage to correctly assign tags at runtime that the execution units have to wait for, the machine does that for you. You also get added benefit that the instructions are now dependent on data and can start executing as soon as that data is available, instead of executing them
L3[00:05:38] <Kristo​pher38> in-order. This lets you execute instructions results of which are independent of each other in parallel - say you execute some instruction A, then some more instructions dependent on A, and sometime later instruction B, and some more instructions dependent on B, but independent from A or any instruction dependent on A - you could very well execute both "streams" as you call them, one dependent on A, and one dependent on B, in parallel. Also thi
L4[00:05:38] <Kristo​pher38> is very useful when you think about instructions that can take multiple cycles - like memory loads. As an example to show this: you could have your execution units wait for some value from memory for a few cycles, sitting in your execution units, and start executing as soon as the value from memory arrives, while other execution units could be doing useful work independent of that memory load
L5[00:05:49] <Ne​uro> LOL timing
L6[00:06:00] <Kristo​pher38> lol sorry, i'm trying to describe it clearly :P
L7[00:06:12] <Ne​uro> no worries just amusing
L8[00:06:44] <Ne​uro> I dont get a lot of what you say tho
L9[00:06:51] <Ne​uro> parallel streaming and the like is all possible
L10[00:06:59] <Ne​uro> I mean, why wouldn't it?
L11[00:07:11] <Ne​uro> I mean, why wouldn't it be? [Edited]
L12[00:07:26] <Ne​uro> likewise instructions executing on data arrival is also already how it was planned
L13[00:07:34] <Ne​uro> maybe there is some fundamental misunderstanding here idk
L14[00:08:21] <Ne​uro> each execution unit has its own independent instruction
L15[00:08:24] <Ne​uro> maybe thats the bit that is confusing?
L16[00:09:07] <Ne​uro> the idea is each EXU is a bubble that interacts minimally with the larger scale CPU
L17[00:09:21] <Ne​uro> it recieves data, executes its instruction, and passes that data on
L18[00:09:22] <Ne​uro> it
L19[00:09:24] <Kristo​pher38> the point here is to relieve the programmer of having to encode where instructions should be put and where results sent to
L20[00:09:25] <Ne​uro> thats it [Edited]
L21[00:09:46] <Ne​uro> I mean, if this was something real, that seems like something a compiler would do
L22[00:10:01] <Ne​uro> no different to assigning memory automatically or whatnot
L23[00:10:17] <Kristo​pher38> that is something real and modern processors do this
L24[00:10:32] <Ne​uro> sorry I mean, if my project was something real
L25[00:10:38] <Ne​uro> in the sense that, im not writing a fancy compiler lmao
L26[00:10:52] <Kristo​pher38> arguably this creates a ton more complexity and likely isn't viable in minecraft but maybe you get some idea out of it
L27[00:11:01] <Ne​uro> what I dont get tho
L28[00:11:07] <Ne​uro> is all your "added benefits"
L29[00:11:13] <Ne​uro> > You also get added benefit that the instructions are now dependent on data and can start executing as soon as that data is available, instead of executing them in-order. This lets you execute instructions results of which are independent of each other in parallel - say you execute some instruction A, then some more instructions dependent on A, and sometime later instruction B, and some more instructions dependent on B, but independent from A
L30[00:11:13] <Ne​uro> or any instruction dependent on A - you could very well execute both "streams" as you call them, one dependent on A, and one dependent on B, in parallel. Also this is very useful when you think about instructions that can take multiple cycles - like memory loads. As an example to show this: you could have your execution units wait for some value from memory for a few cycles, sitting in your execution units, and start executing as soon as the
L31[00:11:13] <Ne​uro> value from memory arrives, while other execution units could be doing useful work independent of that memory load
L32[00:11:14] <Ne​uro> so all this bit
L33[00:11:22] <Ne​uro> all this is very much possible in the system as I describe
L34[00:11:31] <Ne​uro> and I dont mean possible as in I look at this now and think "hm, thats possible"
L35[00:11:36] <Ne​uro> as in it was already envisaged
L36[00:14:54] <Kristo​pher38> well, let me ask, so your EUs wait for other EUs if they don't have their required operand yet?
L37[00:14:59] <Ne​uro> yes
L38[00:15:09] <Ne​uro> i mean obviously what else would they do
L39[00:15:54] <Ne​uro> specifically, there is a (sometimes) configurable quantity called the instruction execute delta
L40[00:15:56] <Kristo​pher38> not have instructions in them, or have nops inserted, or have instructions from other stream being executed there
L41[00:16:06] <Ne​uro> which manages what data has to be recieved to process
L42[00:16:09] <Ne​uro> which manages what data has to be recieved to proceed [Edited]
L43[00:17:12] <Ne​uro> well yes they cant suddenly change their instruction
L44[00:17:26] <Ne​uro> but the point isnt like that on every clock or something the instructions in each exu get updated
L45[00:17:40] <Ne​uro> they are only updated on a code trigger
L46[00:18:02] <Ne​uro> part of the original idea was a system that would need somewhat minimized instruction calling from memory
L47[00:18:36] <Ne​uro> a cells instruction changes when another cell sends it data with a specific extra bit tag
L48[00:19:02] <Ne​uro> but regardless you can still totally do parallelism and the like
L49[00:19:08] <Ne​uro> in multiple ways
L50[00:19:19] <Ne​uro> you could have multiple row0 cells streaming in data from different locations in memory
L51[00:19:31] <Ne​uro> you could have a cell set to split a data stream (either duplicating or round robining)
L52[00:20:13] <Ne​uro> again, maybe the word EXU is confusing
L53[00:20:18] <Ne​uro> I know it has a specific codified meaning after all
L54[00:20:26] <Ne​uro> but thats not rly what these are
L55[00:20:45] <Ne​uro> they are simple machines that react on input, process an output, and send
L56[00:20:45] <Kristo​pher38> no, i get what you mean
L57[00:21:56] <Kristo​pher38> so how do you actually write software for this? how could a program look like?
L58[00:22:50] <Ne​uro> Message contained 4 or more newlines and was pastebined https://paste.pc-logix.com/xexuxapemu
L59[00:23:09] <Ne​uro> (sync syncs a row/column datastream into pairs)
L60[00:23:55] <Kristo​pher38> so the waiting for two-operand ops happens in a separate EU?
L61[00:24:14] <Kristo​pher38> also how would that look like in your assembly
L62[00:24:30] <Ne​uro> if you want to merge datastreams yeah
L63[00:24:35] <Ne​uro> the design is semi-clockless
L64[00:24:42] <Ne​uro> so things kinda run at their own pace
L65[00:24:45] <Ne​uro> and there isnt guaranteed synchronization
L66[00:24:58] <Ne​uro> in reality, in a lot of cases a compiler might reasonably assume synch and skip
L67[00:25:02] <Ne​uro> but it might be needed
L68[00:25:41] <Ne​uro> >Kristopher38: also how would that look like in your…
L69[00:25:41] <Ne​uro> good question
L70[00:25:55] <Ne​uro> I have all the CPU level instructions needed to control and set things complete, at least
L71[00:26:01] <Ne​uro> the best way to ASM them is tricky for sure
L72[00:26:42] <Ne​uro> probably, again if you were serious about it, you would write more "traditional" ASM and some very smart algorithm would figure things out
L73[00:27:02] <Ne​uro> I mean modern compilers are already very smart so its not a stretch
L74[00:27:16] <Ne​uro> but it does need to be said that yeah, this design is certainly worse at certain things
L75[00:27:37] <Ne​uro> it's almost more what a subset of a cpu might look like, or a coprocessing chip
L76[00:27:47] <Ne​uro> as I said waaay up, it's more about processing data streams
L77[00:28:09] <Ne​uro> if you want to just double and add one number, well, it certainly can be done, but it would be inefficient to a decent degree
L78[00:28:40] <Ne​uro> but if you want to do that to any decent quantity of numbers, once you have the grid setup, you can pass through as many as you like
L79[00:28:43] <Kristo​pher38> hmmm, so more like a dsp
L80[00:29:08] <Ne​uro> dsp, copper, even a bit like a GPU, since GPUs have lots of massively parallel datastreaming elements
L81[00:29:18] <Ne​uro> you have to understand, you are thinking about things that exist
L82[00:29:25] <Ne​uro> I did not design this thinking about anything that existed
L83[00:29:35] <Ne​uro> that doesn't mean i'm deluding myself into thinking i've designed something entirely novel
L84[00:29:44] <Ne​uro> but I wasn't specifically thinking about/modelling after anything
L85[00:30:15] <Amanda> %remindme 12h check https://nixpk.gs/pr-tracker.html?pr=146164 before doing weekly update
L86[00:30:17] <MichiBot> I'll tell you "check https://nixpk.gs/pr-tracker.html?pr=146164 before doing weekly update" in 12h at 11/17/2021 12:30:15 PM
L87[00:30:26] <Kristo​pher38> i know, i'm just trying to draw (hehe) parallels between your design and something i know
L88[00:30:36] <Ne​uro> ba dum tiss
L89[00:30:55] <Ne​uro> but yes basically the control flow of the design (which I said I didnt like but it is what it is)
L90[00:31:01] <Ne​uro> is that the 0/0 cell is special
L91[00:31:11] <Ne​uro> and has a little extra segment that detects whether the cell is silent
L92[00:31:18] <Ne​uro> and if it is, pulls an instruction from a pointer
L93[00:31:45] <Ne​uro> these instructions can do anything but the general idea is that it sets other cells to do things like stream instructions into the grid
L94[00:31:49] <Ne​uro> or stream data into the grid
L95[00:32:41] <Ne​uro> to use instructions I have defined, the very first bit of code that runs might look like
L96[00:33:25] <Ne​uro> CPSET
L97[00:33:25] <Ne​uro> DSTRM
L98[00:33:26] <Ne​uro> DSTRM
L99[00:34:03] <Ne​uro> essentially, the row 0 cache will set its own prefetch pointer (separate from instruction pointer) then stream 8 instructions from it to the rest of the row
L100[00:34:19] <Ne​uro> (one of those 8 also going to itself, ofc, altho as described without that it would auto pull the next instruction anyway)
L101[00:34:52] <Ne​uro> those 8 instructions, if set up that way, will in turn have all the other row 0 cells set their precache pointers
L102[00:35:42] <Ne​uro> the second dstream would then set all of them to in turn dstream across the column, which in turn means those 3 "meta" instructions would (potentially) fill the entire grid with a specific set of commands
L103[00:35:50] <Ne​uro> which commands obviously depending on whats in memory
L104[00:36:09] <Ne​uro> the second dstream would then set all of them to in turn dstream across their column, which in turn means those 3 "meta" instructions would (potentially) fill the entire grid with a specific set of commands [Edited]
L105[00:36:38] <Ne​uro> CPSET (set prefetch pointer)
L106[00:36:39] <Ne​uro> DSTRM (Streams up to 8 instructions/variables to cells in row/column)
L107[00:36:39] <Ne​uro> DSTRM [Edited]
L108[00:36:44] <Ne​uro> CPSET (set prefetch pointer)
L109[00:36:44] <Ne​uro> DSTRM (Streams up to 8 instructions/variables to cells in row/column)
L110[00:36:45] <Ne​uro> DSTRM ^^ [Edited]
L111[00:37:19] <luna​r_sam> https://tinyurl.com/yjkctvwr
L112[00:37:35] <Ne​uro> and has a little extra segment that detects whether the grid is silent [Edited]
L113[00:37:54] <Kristo​pher38> what is this precache/prefetch pointer you speak of
L114[00:38:23] <Ne​uro> lol
L115[00:38:36] <Ne​uro> yes, everything I design does have to be unnecessarily complicated
L116[00:38:53] <Kristo​pher38> no, it's just that the naming doesn't tell me what it exactly does
L117[00:38:54] <Ne​uro> its just a pipe inbetween the memory and the row0 cells
L118[00:38:55] ⇦ Quits: ben_mkiv (~ben_mkiv@200116b814f61b00fe3497fffea975f2.dip.versatel-1u1.de) (Ping timeout: 192 seconds)
L119[00:39:03] <Ne​uro> memory attempts to automatically fill it
L120[00:39:28] <Ne​uro> just a small speed buffer really
L121[00:39:37] <Ne​uro> spreads out memory demand etc
L122[00:39:51] <Kristo​pher38> what does it point to
L123[00:39:54] <Ne​uro> setting your prefetch pointer to X means memory will fill X, X+1, X+2 etc
L124[00:40:10] <Ne​uro> (incrementing the pointer each time)
L125[00:40:23] <Kristo​pher38> X is an instruction?
L126[00:40:31] <Ne​uro> x is an address
L127[00:40:34] <Ne​uro> it just fills from an address
L128[00:40:40] <Ne​uro> x is an address in memory [Edited]
L129[00:40:46] <Kristo​pher38> yeah and under that address is an instruction?
L130[00:40:53] <Ne​uro> under that address is anything you want
L131[00:41:01] <Ne​uro> data is data
L132[00:41:11] <Kristo​pher38> 🤨
L133[00:41:32] <Ne​uro> the pointer is something you configure, its not like, automatic
L134[00:41:45] <Ne​uro> you can point it to a bit of data you want to treat as instructions
L135[00:41:52] <Ne​uro> you can point it to a bit of data you want to treat as, well, data
L136[00:41:57] <Amanda> Liizzii so yeah, it seems the fedi server's down again. Or maybe various people's instances stoped trying to federate with us since it was down for so long?
L137[00:42:03] <Kristo​pher38> so you can fill a row of your EUs with data by setting that pointer
L138[00:42:18] <Kristo​pher38> is that right?
L139[00:42:21] <Ne​uro> no
L140[00:42:34] <Kristo​pher38> lmao
L141[00:42:42] <Ne​uro> there are 4 caches and each can be accessed by one of the row0 cells
L142[00:42:45] * Amanda flops down around Elfi, reads to her about a story where truck-kun's driver gets isekai'd
L143[00:42:51] <Ne​uro> so you would set the pointer to some address
L144[00:42:59] <Kristo​pher38> you know, it would be easier if you had a drawing xD
L145[00:43:04] <Ne​uro> and set the cell to pull from the cache and fill, well, whatever you want on its row/column
L146[00:43:13] <Ne​uro> sure sec. my handwriting is, like, sooooo bad tho
L147[00:43:50] <Kristo​pher38> didn't mean to push you into providing a drawing but alright, i'll take that
L148[00:44:02] <Ne​uro> well I also have a whole page of random scribbles that might work
L149[00:44:07] <Ne​uro> sorry, many whole pages
L150[00:44:12] <Kristo​pher38> monaks
L151[00:44:15] <Kristo​pher38> monkas [Edited]
L152[00:44:22] <Ne​uro> but yeah id need to make something just for this so youd undersyand
L153[00:44:25] <Ne​uro> but yeah id need to make something just for this so youd understand [Edited]
L154[00:44:32] <Ne​uro> >Kristopher38: monkas
L155[00:44:32] <Ne​uro> I mean . . of course I do? CPUs dont design themselves
L156[00:44:41] <Ne​uro> and they are not simple
L157[00:46:57] <Ne​uro> Le scribblings of a very sane person https://tinyurl.com/yjezuloc
L158[00:47:05] <Ne​uro> anyway I will draw an image to explain more clearly
L159[00:47:10] <Ne​uro> sec
L160[00:47:20] <Kristo​pher38> i usually make stuff up as i go in logisim and possibly have some design doc that i put docs for my future self
L161[00:47:38] <Ne​uro> there is a gsheets design doc too
L162[00:47:41] <Kristo​pher38> i usually make stuff up as i go in logisim and possibly have some design doc that i put in info for my future self [Edited]
L163[00:47:46] <Ne​uro> altho its certainly not as complete as it maybe should be
L164[00:48:20] <Ne​uro> this is more the random scribbles notepad
L165[00:48:22] <Kristo​pher38> are you implying that documentation can ever be complete?
L166[00:48:32] <Ne​uro> well, it can be closer
L167[00:50:41] <Ne​uro> https://tinyurl.com/yhyefuhc
L168[00:51:03] <Ne​uro> nvm discord ui for taking pictures is ass
L169[00:51:33] <Ne​uro> https://tinyurl.com/yf85lqkb
L170[00:51:39] <Ne​uro> thats a drawing of the leftmost row of the field, row 0
L171[00:51:46] <Ne​uro> or specifically, the 8 cells on the right are row 0
L172[00:52:02] <Ne​uro> each pair of them shares a pipe which pulls from memory
L173[00:52:10] <Ne​uro> again, "cache" is probably not great wording
L174[00:52:14] <Ne​uro> they are simply just pipes
L175[00:52:56] <Ne​uro> each cache has a pointer and, if it is not full, is constantly attempting to fill itself with whatever is at that pointer
L176[00:52:59] <Kristo​pher38> pipes is not a great wording either since it has a meaning in the context of operating systems
L177[00:53:01] <Ne​uro> it will then delta the pointer as set
L178[00:53:12] <Kristo​pher38> i'd just call them data buses or something
L179[00:53:15] <Ne​uro> it will then delta the pointer [Edited]
L180[00:53:23] <Ne​uro> well, they are FIFO pipes
L181[00:53:32] <Kristo​pher38> ah, in THAT sense
L182[00:53:35] <Ne​uro> bus works but they have inherent storage
L183[00:53:38] <Ne​uro> so not really like a bus
L184[00:53:41] <Kristo​pher38> you should've said so from the beginning
L185[00:53:46] <Ne​uro> sorry
L186[00:53:55] <Kristo​pher38> fifo queues
L187[00:53:59] <Ne​uro> as I said, they are just simple buffering things for efficiency
L188[00:54:01] <Ne​uro> queue also works
L189[00:54:09] <Kristo​pher38> well that clears up naming misunderstandings
L190[00:54:14] <Ne​uro> im honestly not sure what else a pipe means tho
L191[00:54:17] <Ne​uro> thats what it means to me
L192[00:54:24] <Ne​uro> pipe vs stack, FIFO vs FILO
L193[00:54:28] <Ne​uro> but anyway
L194[00:55:29] <Kristo​pher38> pipe in the context of OS moves stdout of one process into stdin of another
L195[00:55:47] <Kristo​pher38> you've certainly seen something like this `cat foo | grep bar`
L196[00:55:54] <Ne​uro> well yeah I get that, but we are talking some many levels below OS level stuff lmao
L197[00:56:12] <Ne​uro> >Kristopher38: you've certainly seen something like …
L198[00:56:13] <Ne​uro> I actually have not but I mean I know what stdout and stdin are and the basic visual of a pipe is easy enough to get what it means
L199[00:56:39] <Kristo​pher38> yeah but pipe didn't have any meaning in the lowlevel sense for me
L200[00:56:52] <Ne​uro> ah ok, well, thats the meaning i had attached to it
L201[00:56:53] <Kristo​pher38> well whatever
L202[00:56:58] <Ne​uro> dont know from where but I dont think I made it up at least
L203[00:57:20] <Kristo​pher38> that's certainly an interesting architecture you've got there
L204[00:57:28] <Ne​uro> really? lmao
L205[00:57:37] <Kristo​pher38> reminds me a bit of fpgas
L206[00:57:39] <Ne​uro> I'm aware that it's interesting
L207[00:57:45] <Ne​uro> the old design was much more standard
L208[00:57:56] <Ne​uro> 4 cores, basic. instruction in, instruction out. repeat
L209[00:58:04] <Ne​uro> real basic tier stuff
L210[00:58:18] <Ne​uro> obviously ive done that now, even if its not complete
L211[00:58:23] <Ne​uro> im not gonna do it again, now am I
L212[00:58:38] <Kristo​pher38> like, an fpga has its basic elements arranged in a grid and between those are column and row interconnects
L213[00:58:51] <Ne​uro> know what an FPGA is, didnt know that directly
L214[00:59:01] <Ne​uro> but those gates are bitlogic gates not execution units, right?
L215[00:59:54] <Kristo​pher38> yeah kind of, your concept is a programmable data processing unit, fpga is pressetable hardware i guess
L216[00:59:58] <Kristo​pher38> yeah kind of, your concept is a programmable data processing unit, fpga is pressetable hardware i guess you could call it [Edited]
L217[01:00:16] <Ne​uro> yeah its weird
L218[01:00:31] <Ne​uro> its main downside is the fact its hard to set it efficiently
L219[01:00:52] <Ne​uro> but you can at least theoretically conceive of really dense encodings that could do a lot of things at once
L220[01:01:05] <Ne​uro> I mean, you have a pool of 64 instructions stored, in a sense
L221[01:01:10] <Kristo​pher38> i have a lowres fpga conceptual diagram https://tinyurl.com/yfvbpvz7
L222[01:01:11] <Ne​uro> you can do quite a bit with 64 instructions
L223[01:01:23] <Ne​uro> without having to change any of them out
L224[01:01:28] <Ne​uro> >Kristopher38: i have a lowres fpga conceptual diagr…
L225[01:01:28] <Ne​uro> looks similar yeah
L226[01:01:32] <Ne​uro> I havent studied it
L227[01:01:45] <Ne​uro> I mean, I havent studied anything, I dropped out of uni year one because I am incapable of interacting with people
L228[01:03:40] <Ne​uro> as I said, I had dreams of much weirder and much cleverer encodings
L229[01:04:01] <Ne​uro> things in the vein of being able to stream data into an empty grid and have the grid sort of self-set and process based on just one datastream
L230[01:04:13] <Ne​uro> no breaks or overarching control schema needed
L231[01:04:52] <Ne​uro> it would probably be possible if I gave myself more bits, because everything is possible with more bits
L232[01:05:04] <Ne​uro> it would *probably* be possible if I gave myself more bits, because everything is possible with more bits (specifically, more bits reserved to not-data) [Edited]
L233[01:05:15] <Co​mpu> >Izaya: ended up doing this to sanitise them …
L234[01:05:15] <Co​mpu> they did that at first but breaking the link and making it again seemed to fix that
L235[01:05:22] <Amanda> %chooseirradiate or hallucinate
L236[01:05:36] <Amanda> %choose irradiate or hallucinate
L237[01:05:37] <MichiBot> Ama​nda: The proof is in the pudding. Definitely "irradiate". Now please get it out of my pudding.
L238[01:26:45] <Kristo​pher38> Well, that has certainly been an interesting conversation
L239[01:27:21] <Kristo​pher38> But I must recede to bed now
L240[01:27:24] <Ne​uro> my pleasure
L241[01:27:52] <Ne​uro> I certainly don't do these things to share them with people, but I certainly dont mind doing so either
L242[01:28:04] <Kristo​pher38> I'll be waiting to see the results of your endeavours :D
L243[01:28:19] <Ne​uro> in good time, in good time. there is a lot to be done
L244[01:33:27] <dequbed> @Neuro I'm just skimming the backlog atm but have you just reinvented CPLD? :P
L245[01:33:40] <Ne​uro> CPLD = ?
L246[01:34:05] <Ne​uro> hmm, perhaps
L247[01:34:11] <Ne​uro> certainly looks similar, like an FPGA
L248[01:34:36] <CompanionCube> dequbed: inb4 reinvent the itanic as well
L249[01:34:40] <Ne​uro> yeah, sounds pretty similar
L250[01:34:57] <Ne​uro> at least in a very basic overview level
L251[01:34:57] <dequbed> CPLD are quite dissimilar to FPGA but sure, they're closer than FPGA and CPU are
L252[01:35:19] <Ne​uro> yes because as I said fpgas have more simple base components
L253[01:35:31] <Ne​uro> while CPLD seem to have much more complicated ones, as does this design
L254[01:36:06] ⇦ Quits: Vampyre (~spy@87.214.188.202) (Ping timeout: 195 seconds)
L255[01:36:14] <Ne​uro> so yeah your answer is . . maybe?
L256[01:36:22] <Ne​uro> you would probably know more than me heh
L257[01:36:51] <Ne​uro> I certainly did not know what a CPLD was before designing this at least, that I can confirm
L258[01:37:02] <Ne​uro> and as said I wasnt specifically thinking of anything real when designing this
L259[01:37:51] <Ne​uro> I was vaguely thinking about a way to maximise instruction read efficiency, ie how much you get from each instruction
L260[01:38:01] <Ne​uro> and figured that something like this would be a way to go about it
L261[01:38:12] <Ne​uro> since once you have set a field you can use it many many times
L262[01:38:24] <Ne​uro> obviously it would not be ideal for everything as said
L263[01:38:32] <Ne​uro> but itd be good for certain applications
L264[01:39:36] <Ne​uro> >CompanionCube: dequbed: inb4 reinvent the itanic as …
L265[01:39:37] <Ne​uro> itanic? the huge overambitious design that floundered or the ship?
L266[01:58:25] <CompanionCube> the former.
L267[02:00:11] <Ocawes​ome101> itanic, or itanium?
L268[02:00:20] <Ocawes​ome101> the ship was titanic
L269[02:00:40] <Ne​uro> itanic is a meme word combining the two
L270[02:00:49] <Ne​uro> because, you know, itanium was a colossal failure
L271[02:00:54] <Ocawes​ome101> ah
L272[02:00:59] <Ocawes​ome101> fair enough
L273[02:01:06] <Ne​uro> been around for a while yeah
L274[02:01:12] <Ne​uro> I knew but was just joking around earlier
L275[02:12:13] ⇨ Joins: Vampyre (~spy@87.214.188.202)
L276[02:13:23] ⇨ Joins: Hawk777 (~chead@2607:c000:8274:b100:d12c:2883:3b45:be05)
L277[02:58:12] * Amanda offers elfi some snacks, passes out after doing so
L278[02:58:36] <Amanda> %remindme 9h dump the switch as card
L279[02:58:39] <MichiBot> I'll tell you "dump the switch as card" in 9h at 11/17/2021 11:58:37 AM
L280[02:58:52] <Amanda> Night nerds
L281[03:28:24] <Amanda> 🥳 I can't sleep!
L282[03:31:10] <Ne​uro> Tell me about it
L283[03:31:20] <Ne​uro> Hope it gets better ')
L284[03:31:26] <Ne​uro> Hope it gets better :) [Edited]
L285[03:40:10] <Amanda> %tell Inari wasp-proof leafs! https://www.nintendolife.com/news/2021/11/random-theres-a-new-wasp-escape-trick-in-animal-crossing-new-horizons-2-0
L286[03:40:12] <MichiBot> Ama​nda: Inari will be notified of this message when next seen.
L287[03:41:02] * Amanda drapesher tail over elfi to use as a blanket since it's getting colder out there, attempts sleep again
L288[03:44:08] <Elfi> zzz
L289[03:46:54] <lunar_sam> who the fuck trusted me with c
L290[04:00:57] ⇦ Quits: flappy (~flappy@91-154-0-54.elisa-laajakaista.fi) (Ping timeout: 189 seconds)
L291[05:45:14] <lunar_sam> https://www.toptal.com/developers/hastebin/oxecobusal.c very nice
L292[05:55:55] <Va​ur> %tonkout
L293[05:56:00] <MichiBot> Yay! Va​ur! You beat your own previous record of 11 hours, 14 minutes and 3 seconds (By 1 hour, 26 minutes and 34 seconds)! I hope you're happy!
L294[05:56:01] <MichiBot> Va​ur has tonked out! Tonk has been reset! They gained 0.012 tonk points! plus 0.022 bonus points for consecutive hours! Current score: 4.18153264, Position #1
L295[06:34:55] <Forec​aster> %sip
L296[06:34:59] <MichiBot> You drink a muddy red potion (New!). Forecaster suddenly forgets a random piece of trivia.
L297[07:33:03] <Ar​iri> >dequbed: But still, oh no two people kissing h…
L298[07:33:04] <Ar​iri> “Hey girl, are you NSFW? Because I can’t focus on my work when you’re around”
L299[07:53:59] ⇦ Quits: Hawk777 (~chead@2607:c000:8274:b100:d12c:2883:3b45:be05) (Quit: Leaving.)
L300[08:30:35] ⇨ Joins: ben_mkiv (~ben_mkiv@2001:16b8:1ea9:1700:fe34:97ff:fea9:75f2)
L301[09:53:07] <Liizzii> > Amanda> Liizzii so yeah, it seems the fedi server's down again. Or maybe various people's instances stoped trying to federate with us since it was down for so long?
L302[09:53:07] <Liizzii> No idea, at some point i need to have a proper poke at our pleroma instance and maybe update it, possibly also see if i can't re-do it and actually document stuff this time around and also not set it up on alpine
L303[10:50:05] ⇨ Joins: confused (webchat@178.197.220.140)
L304[10:51:51] <confused> Hey there! I mostly just want to play with the most recent OpenComputers, i don't care much about other mods. Can any clear up which minecraft version i should pick? I am confused why there is 1.7.10 as well as 1.12.2 and many modpacks seem to stick to old versions for various reasons. If i am only about OC on a relatively low powered laptop, what
L305[10:51:51] <confused> should i pick?
L306[10:52:34] <confused> Or recommend any modpack that focuses on OC?
L307[11:01:21] <Kristo​pher38> well, 1.7.10 is for minecraft 1.7.10, and 1.12.2 is for minecraft 1.12.2
L308[11:02:05] <Kristo​pher38> if you're unsure grab 1.12.2
L309[11:02:34] ⇨ Joins: MajGenRelativity (~MajGenRel@c-73-123-203-209.hsd1.ma.comcast.net)
L310[11:03:05] <confused> thanks! performance did not get worse either i assume?
L311[11:05:00] <Kristo​pher38> oh i don't know about performance
L312[11:05:57] ⇦ Quits: confused (webchat@178.197.220.140) (Quit: webchat.esper.net)
L313[11:44:11] ⇦ Quits: ben_mkiv (~ben_mkiv@2001:16b8:1ea9:1700:fe34:97ff:fea9:75f2) (Ping timeout: 192 seconds)
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L316[11:58:38] <MichiBot> Amanda REMINDER: dump the switch as card
L317[12:30:16] <MichiBot> Amanda REMINDER: check https://nixpk.gs/pr-tracker.html?pr=146164 before doing weekly update
L318[12:43:29] <Amanda> Liizzii: I tried sending a toot at ariri, Elfi, and izaya, but that doesn't seem to have done much
L319[12:44:04] <Amanda> My theory was it'd get their instances to notice it's alive
L320[12:54:38] <Amanda> Oh. Good job, Amanda, lock yourself out of your laptop why don't you
L321[12:55:12] <Forec​aster> Maximum security
L322[12:55:36] <Forec​aster> %tonk
L323[12:55:37] <MichiBot> Jeepers! Forec​aster! You beat Va​ur's previous record of <0 (By 6 hours, 59 minutes and 39 seconds)! I hope you're happy!
L324[12:55:38] <MichiBot> Forecaster's new record is 6 hours, 59 minutes and 39 seconds! Forecaster also gained 0.00699 tonk points for stealing the tonk. Position #2. Need 0.45918254 more points to pass Va​ur!
L325[13:15:23] <Ash​irg> https://cdn.discordapp.com/attachments/683514982884835396/910493637098475520/videoplayback-3.mp4
L326[13:16:20] <Ne​uro> >Ashirg: https://cdn.discordapp.com/attachment���
L327[13:16:20] <Ne​uro> thats funny, didnt know that
L328[13:16:25] <Ne​uro> >Amanda: Oh. Good job, Amanda, lock yourself o…
L329[13:16:26] <Ne​uro> how'd you manage that?
L330[13:16:46] <Amanda> Configured my password to an unknown value
L331[13:16:58] <Ne​uro> welp
L332[13:17:22] <Amanda> fixed it now
L333[13:17:36] <Ne​uro> ah good
L334[13:26:34] <Amanda> %remindme 6d possibly revert b7fd73e8c7974b08ce6316b4b08d14208d8ccdbe if https://nixpk.gs/pr-tracker.html?pr=146164 is propogated
L335[13:26:41] <MichiBot> I'll tell you "possibly revert b7fd73e8c7974b08ce6316b4b08d14208d8ccdbe if https://nixpk.gs/pr-tracker.html?pr=146164 is propogated" in 6d at 11/23/2021 01:26:40 PM
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L338[13:34:35] ⇨ Joins: ben_mkiv (~ben_mkiv@2001:16b8:1ea9:1700:fe34:97ff:fea9:75f2)
L339[13:44:06] ⇦ Quits: Amanda (~m-yt727s@c-73-165-62-84.hsd1.pa.comcast.net) (Ping timeout: 195 seconds)
L340[13:45:24] ⇨ Joins: Amanda (~m-yt727s@c-73-165-62-84.hsd1.pa.comcast.net)
L341[13:52:15] ⇨ Joins: Neuro (~neuro@212.82.91.46)
L342[13:52:41] <Neuro> great that this works from ingame lol
L343[13:58:52] ⇦ Quits: Neuro (~neuro@212.82.91.46) (Remote host closed the connection)
L344[14:02:46] ⇨ Joins: TPG24 (~ThePiGuy2@host-92-31-110-4.as13285.net)
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L346[14:07:09] <dequbed> @Ariri yes yes eyes on the price and all that but stop looking at my boobs already :P
L347[14:10:54] <Elfi> Amanda; I received it, faved, and replied, nothing in return? :c
L348[14:11:22] <Amanda> Elfi: appears not
L349[14:11:52] <Amanda> https://matrix.camnet.site/_matrix/media/r0/download/camnet.site/FoGzdgMcvRBOVrDafxaXxBHN/Screenshot_20211117-091133.png
L350[14:15:02] <Amanda> Elfi: latest I see from you is your reply to rgegriff about resin reuse
L351[14:15:48] <Amanda> Latest I see from Izaya is from 4 months ago
L352[14:16:20] <Amanda> same from Ariri
L353[14:24:15] <Ne​uro> ok figured out fast memory access control as was vaguely describing yesterday
L354[14:24:23] <Ne​uro> I don'
L355[14:24:48] <Ne​uro> I don't like it a ton because it's a very designed for minecraft solution, and very different as to how you would do things in anything more real [Edited]
L356[14:24:57] <Ne​uro> but it has its own cleverness in some ways
L357[14:31:38] <Ar​iri> dequbed: ;3 <3
L358[14:54:51] <Forec​aster> %sip
L359[14:54:53] <MichiBot> You drink a dull oculemon potion (New!). A bard starts playing a lute behind Forecaster until they have A Smooth potion.
L360[14:55:00] <Forec​aster> Aww man
L361[14:55:10] <Izaya> Amanda: I post ... much more frequently than every 4 months
L362[15:02:24] <Liizzii> Amanda, i've given the pleroma container a restart, try again in a few minutes and see if that works for you
L363[15:04:01] <Forec​aster> https://i.imgur.com/mgI49Jf.mp4
L364[15:04:54] <Ne​uro> birb
L365[15:10:17] <Forec​aster> it's a baby falcon apparently, there's sound
L366[15:11:44] <Ne​uro> not for me? idjk
L367[15:11:47] <Ne​uro> not for me? idk [Edited]
L368[15:11:57] <Ne​uro> oh nvm found imgurs mute button
L369[15:11:59] <Ne​uro> what an odd placement
L370[15:17:10] ⇦ Quits: ben_mkiv (~ben_mkiv@2001:16b8:1ea9:1700:fe34:97ff:fea9:75f2) (Remote host closed the connection)
L371[15:49:54] ⇨ Joins: Vexatos (~Vexatos@port-92-192-131-75.dynamic.as20676.net)
L372[15:49:54] zsh sets mode: +v on Vexatos
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L374[15:55:13] ⇦ Quits: FoxPodZ (~FoxPodZ@static.71.217.202.116.clients.your-server.de) (Client Quit)
L375[15:55:30] <Forec​aster> %sip smooth potion
L376[15:55:32] <MichiBot> You drink a smooth sapphire potion (New!). The sun turns into a giant baby face for a second. It's horrific.
L377[15:55:51] <Forec​aster> at least it didn't last as long as the lute playing
L378[15:57:17] <Va​ur> %sip
L379[15:57:18] <Ne​uro> teletubbies moment
L380[15:57:19] <MichiBot> You drink a prickly citrus potion (New!). A bard behind Vaur suddenly stops playing. They were most likely eaten by a monster.
L381[16:05:56] ⇨ Joins: Zalio (~Zalio@static.245.91.90.157.clients.your-server.de)
L382[16:06:02] ⇦ Quits: Zalio (~Zalio@static.245.91.90.157.clients.your-server.de) (Client Quit)
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L384[16:11:29] ⇦ Quits: Zalio (~Zalio@static.245.91.90.157.clients.your-server.de) (Quit: Zalio)
L385[17:04:45] <Ash​irg> >>> “Sigh, another monster. It is hopeless. No one can save me,” the skeleton said.
L386[17:04:45] <Ash​irg> “Waaa, the skeleton is talking!” the clone shouted.
L387[17:04:45] <Ash​irg> The skeleton backed down and shouted, “Waa, the chicken monster is talking! Wait, you can talk?”
L388[17:04:59] <Ash​irg> This chicken story is interesting
L389[17:06:01] <Forec​aster> wait, is the clone the chicken monster?
L390[17:23:10] ⇨ Joins: NEROX (~NEROX@176.107.81.204)
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L393[17:26:07] <luna​r_sam> upnp time
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L400[17:51:49] *** Kotya is now known as NEROX
L401[17:52:17] *** NEROX is now known as Kotya
L402[17:52:35] <Ne​uro> it would be nice if there was some sort of selective discord channel mute so all this stuff doesn't show up
L403[17:52:46] <Ne​uro> I guess that would be too useful a feature for discord to implement
L404[17:53:44] <Forec​aster> that's probably why there are unofficial client addons
L405[17:53:48] <Ne​uro> it would be nice if there was some sort of selective discord channel mute so all this stuff doesn't show up (not not show up in the channel, not show up in the sidebar etc) [Edited]
L406[17:54:07] <Ne​uro> yeah I know there's a bunch
L407[17:54:16] <Ne​uro> dont want to be banned tho
L408[17:56:24] ⇦ Quits: Kotya (~Kotya@176.107.81.204) (Remote host closed the connection)
L409[18:03:46] <Izaya> friends don't let friends use discord; remember to report anyone that admits to using a third-party client
L410[18:06:01] <Ne​uro> Big Jason Protects
L411[18:10:23] <Senl​iast> hello
L412[18:10:33] <Ne​uro> hi
L413[18:11:04] <Senl​iast> on the last OC experimental build 217, the rs.setOutput() doesnt work
L414[18:11:20] <Senl​iast> for MC 1.12.2
L415[18:11:43] <Ne​uro> known issue, been mentioned
L416[18:11:47] <Ne​uro> no clue about a fix tho
L417[18:12:47] <Ne​uro> https://github.com/MightyPirates/OpenComputers/issues/3470
L418[18:12:48] <Ne​uro> specifically
L419[18:13:14] <MichiBot> Title: Cannot set output value on Redstone I/O | Posted by: ghost | Posted: Sun Sep 19 18:21:21 UTC 2021 | Status: open
L420[18:13:24] <Senl​iast> oh okay... one more question, is the issue with computers randomly turns off known here?
L421[18:13:37] <Ne​uro> not 100% sure but you can always check https://github.com/MightyPirates/OpenComputers/issues
L422[18:13:46] <Izaya> eternally dubious persistence
L423[18:14:14] <Ne​uro> https://github.com/MightyPirates/OpenComputers/issues/3463
L424[18:14:19] <Ne​uro> this seems to be related? maybe?
L425[18:14:19] <MichiBot> Title: Computers shut down on server randomly. Havent tracked down cause yet. | Posted by: cadergator10 | Posted: Tue Aug 10 02:52:39 UTC 2021 | Status: open
L426[18:14:26] <Forec​aster> they don't exactly turn off, they just kinda stop
L427[18:14:48] <Senl​iast> yeah the problem is, i already asked for it on github, with logs,etc. and the dev said that the issue will not be fixed as it is difficulty respoducable or so on...
L428[18:15:11] <Forec​aster> it's very spontaneous
L429[18:15:31] <Forec​aster> if it's a huge problem you can always turn off persistance
L430[18:16:09] <Senl​iast> i already tried it, but they just turn off allthrough, it doesnt change anything
L431[18:16:44] <Izaya> I have a redstone timer hooked up to a machine with wolbeacon installed
L432[18:17:21] <Izaya> when persistence works that's great, but I don't trust it so I have that computer wake up everything on the network
L433[18:22:02] ⇦ Quits: Kilobyte (~kilobyte@banana-new.kilobyte22.de) (Quit: ZNC - 1.6.0 - http://znc.in)
L434[18:22:11] ⇦ Quits: jackie (~jackie@banana-new.kilobyte22.de) (Quit: jackie)
L435[18:22:15] <Senl​iast> allright... well through, i wanted to ask may be the dev can fix it if he will have time at some point... that would be great. Because the problem didnt exist in MC 1.7.10
L436[18:22:49] <Forec​aster> it did
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L438[18:25:03] zsh sets mode: +v on jackie
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L440[18:25:05] zsh sets mode: +v on Kilobyte
L441[18:26:52] <Ocawes​ome101> @Senliast try build 212 for working redstone io
L442[18:28:23] <Senl​iast> thanks. i am currently trying out 216, the redstone here is woring also
L443[18:30:19] <Ocawes​ome101> ah so it was just 217 that broke the redstone io block?
L444[18:32:52] <Senl​iast> seems like
L445[18:42:59] <Mic​hiyo> >Neuro: dont want to be banned tho
L446[18:43:00] <Mic​hiyo> I've been running BetterDiscord for ages, no ban.
L447[18:43:25] <Ne​uro> yeah im not claiming its a guarantee, more like, lets not even be close to the possibility
L448[18:43:58] <Ne​uro> I would lose . . quite a bit if I got banned. You can say thats a fault in and of itself and maybe it is, but for now it is how it is
L449[18:46:32] <Ne​uro> I certainly know discord has been inconsistent and finnicky with userbots, clients, addons, etc etc
L450[18:46:43] <Ne​uro> you know, generic big company nonsense
L451[18:47:36] <Mic​hiyo> I've also ran a userbot for the better part of 2 years with no issues, but I know some people have said they have been banned for it.
L452[18:47:56] <Mic​hiyo> So.. shrug
L453[18:55:08] <Ne​uro> anyway, it was a minor thing. Just one of the many small things discord could do instead of shilling NFTs or whatever nonsense they are actually spending dev time doing
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L457[19:30:18] <Forec​aster> %sip
L458[19:30:18] <MichiBot> You drink a mutable bavarium potion (New!). Forecaster turns into a crocodile girl until they see a star fall.
L459[19:30:28] <Forec​aster> dangit
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L465[21:33:02] <c​1> has anyone made some way or workaround to run python code on cc:t
L466[21:36:12] <Forec​aster> %tonkout
L467[21:36:13] <MichiBot> Holy paperclip, big one Batman! Forec​aster! You beat your own previous record of 6 hours, 59 minutes and 39 seconds (By 1 hour, 40 minutes and 56 seconds)! I hope you're happy!
L468[21:36:14] <MichiBot> Forec​aster has tonked out! Tonk has been reset! They gained 0.008 tonk points! plus 0.014 bonus points for consecutive hours! Current score: 3.7443501, Position #2 Need 0.43718254 more points to pass Va​ur!
L469[21:36:41] <Ne​uro> wtf even is this
L470[21:39:03] <Forec​aster> https://michibot.pc-logix.com/tonk
L471[21:41:51] <Ne​uro> hm, neat. i guess
L472[21:43:06] <Forec​aster> you should use your blue shell
L473[21:43:10] <Forec​aster> for reasons
L474[21:43:52] <Ne​uro> because you want to pass vaur
L475[21:44:03] <Forec​aster> whaaaaat noooo
L476[22:09:18] ⇦ Quits: alekso56 (~cax@ti0107a400-0568.bb.online.no) (Ping timeout: 375 seconds)
L477[22:15:32] ⇨ Joins: alekso56 (~cax@2001:464b:c21a:0:745d:45ff:fe3b:a098)
L478[22:15:50] *** alekso56 is now known as Guest5980
L479[22:19:25] ⇦ Quits: ben_mkiv (~ben_mkiv@2001:16b8:1ea9:1700:fe34:97ff:fea9:75f2) (Ping timeout: 192 seconds)
L480[22:24:41] <Va​ur> %sip
L481[22:24:41] <MichiBot> You drink a runny automato potion (New!). A trapdoor suddenly opens up under Vaur! There are spikes at the bottom. They fail to evade it with a 10 vs DC 15 and takes 1d​6 => 2 damage.
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